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	Number	Readable	Writable
Active Video Line LSB Register	$1F	true	false
Active Video Line MSB Register	$1E	true	false
Alternate ROM	$8C	true	true
Anti-brick Register	$10	true	true
CPU Speed Register	$07	true	true
Clip Window Control Register	$1C	true	true
Clip Window Layer 2 Register	$18	true	true
Clip Window Sprites Register	$19	true	true
Clip Window Tilemap Register	$1B	true	true
Clip Window ULA/LoRes Register	$1A	true	true
Config Mapping Register	$04	false	true
Copper Control High Byte	$62	true	true
Copper Control Low Byte	$61	true	true
Copper Data	$60	false	true
Copper Data 16-bit Write Register	$63	false	true
Core Version Register	$01	true	false
Core Version Register (sub minor)	$0E	true	false
DAC A+D (mono) mirror Register	$2D	true	true
DAC B (left) mirror Register	$2C	true	true
DAC C (right) mirror Register	$2E	true	true
Debug LED Control Register	$FF	false	true
Default Tilemap Attribute Register	$6C	true	true
Display Control 1 Register	$69	true	true
DivMMC Trap Enable 1 Register	$B2	true	true
DivMMC Trap Enable 2 Register	$B4	true	true
ESP WiFi GPIO Output Register	$A8	true	true
ESP WiFi GPIO Register	$A9	true	true
Enhanced ULA Control Register	$43	true	true
Enhanced ULA Ink Color Mask	$42	true	true
Enhanced ULA Palette Extension	$44	true	true
Expansion Bus Control Register	$81	true	true
Expansion Bus Decoding b0-7 Register	$86	true	true
Expansion Bus Decoding b16-23 Register	$88	true	true
Expansion Bus Decoding b24-31 Register	$89	true	true
Expansion Bus Decoding b8-15 Register	$87	true	true
Expansion Bus Enable Register	$80	true	true
Expansion Bus I/O Propagate Register	$8A	true	true
Extended Keys 0 Register	$B0	true	false
Extended Keys 1 Register	$B1	true	false
Global Transparency Register	$14	true	true
Internal Port Decoding b0-7 Register	$82	true	true
Internal Port Decoding b16-23 Register	$84	true	true
Internal Port Decoding b24-31 Register	$85	true	true
Internal Port Decoding b8-15 Register	$83	true	true
Keymap High Address Register	$28	true	true
Keymap High Data Register	$2A	false	true
Keymap Low Address Register	$29	false	true
Keymap Low Data Register	$2B	false	true
Layer 2 Control Register	$70	true	true
Layer 2 RAM Page Register	$12	true	true
Layer 2 RAM Shadow Page Register	$13	true	true
Layer 2 X Offset MSB Register	$71	true	true
Layer 2 X Offset Register	$16	true	true
Layer 2 Y Offset Register	$17	true	true
LoRes Control Register	$6A	true	true
LoRes X Offset Register	$32	true	true
LoRes Y Offset Register	$33	true	true
Machine ID Register	$00	true	false
Machine Type Register	$03	true	true
Memory Mapping Register	$8E	true	true
Memory management slot 0 bank	$50	true	true
Memory management slot 1 bank	$51	true	true
Memory management slot 2 bank	$52	true	true
Memory management slot 3 bank	$53	true	true
Memory management slot 4 bank	$54	true	true
Memory management slot 5 bank	$55	true	true
Memory management slot 6 bank	$56	true	true
Memory management slot 7 bank	$57	true	true
Next Reset Register	$02	true	true
Palette Index Register	$40	true	true
Palette Value Register	$41	true	true
Peripheral 1 Register	$05	true	true
Peripheral 2 Register	$06	true	true
Peripheral 3 Register	$08	true	true
Peripheral 4 Register	$09	true	true
Peripheral 5 Register	$0A	true	true
Pi GPIO Output Enable Register	$90-$93	true	true
Pi GPIO Register	$98-$9B	true	true
Pi I2S Audio Control Register	$A2	true	true
Pi I2S Clock Divide Register	$A3	true	true
Pi Peripheral Enable Register	$A0	true	true
Sprite and Layers System Register	$15	true	true
Sprite port-mirror Attribute 0 (with INC) Register	$75	false	true
Sprite port-mirror Attribute 0 Register	$35	false	true
Sprite port-mirror Attribute 1 (with INC) Register	$76	false	true
Sprite port-mirror Attribute 1 Register	$36	false	true
Sprite port-mirror Attribute 2 (with INC) Register	$77	false	true
Sprite port-mirror Attribute 2 Register	$37	false	true
Sprite port-mirror Attribute 3 (with INC) Register	$78	false	true
Sprite port-mirror Attribute 3 Register	$38	false	true
Sprite port-mirror Attribute 4 (with INC) Register	$79	false	true
Sprite port-mirror Attribute 4 Register	$39	false	true
Sprite port-mirror Index Register	$34	true	true
Sprites Transparency Index Register	$4B	true	true
Tile Definitions Base Address Register	$6F	true	true
Tilemap Base Address Register	$6E	true	true
Tilemap Control Register	$6B	true	true
Tilemap Offset X LSB Register	$30	true	true
Tilemap Offset X MSB Register	$2F	true	true
Tilemap Offset Y Register	$31	true	true
Tilemap Transparency Index Register	$4C	true	true
Transparency colour fallback Register	$4A	true	true
ULA Control Register	$68	true	true
ULA X Offset Register	$26	true	true
ULA Y Offset Register	$27	true	true
User Storage 0 Register	$7F	true	true
Vertical Video Line Offset Register	$64	true	true
Video Line Interrupt Control Register	$22	true	true
Video Line Interrupt Value Register	$23	true	true
Video Timing Register	$11	true	true