Internal Port Decoding b16-23 Register
|Short Description||Enabling internal ports decoding|
|7||(bit 23) Enabling SpecDrum DAC Output ($xxDF / 223) (DAC mono Specdrum)|
|6||(bit 22) Enabling ($xxB3) (DAC mono GS Covox)|
|5||(bit 21) Enabling ($xxFB) (DAC mono Pentagon/ATM (sd mode 2 off))|
|4||(bit 20) Enabling ($xx0F) and ($xx4F) (DAC stereo Covox)|
|3||(bit 19) Enabling ($xx3F) and ($xx5F) (DAC stereo profi Covox)|
|2||(bit 18) Enabling ($xxF1), ($xxF3), ($xxF9) and ($xxFB) (DAC soundrive mode 2)|
|1||(bit 17) Enabling ($xx0F), Kempston Joystick ($xx1F / 31), ($xx4F) and ($xx5F) (DAC soundrive mode 1)|
|0||(bit 16) Enabling Turbo Sound Next Control ($FFFD / 65533) and Sound Chip Register Write ($BFFD / 49149)|
since core3.1.1: all bits are set to 1 when: soft reset and bit 31 is set OR hard reset and bit 31 is clear (otherwise content is kept intact).
All bits are set to 1 upon soft reset.
The internal port decoding enables always apply.
When the expansion bus is on, the expansion port decoding (Next Registers $86-$89) enables are logically ANDed with the internal enables (Next Registers $82-$85). A zero bit indicates the internal device is disabled.
If the expansion bus is on, this allows I/O cycles for disabled internal ports to propagate to the expansion bus, otherwise corresponding I/O cycles to the expansion bus are filtered.
(note: Next registers with number higher than $7F are inaccessible from Copper code)