Layer 2 X Offset Register | $16 | Yes | Yes | Sets the pixel offset used for drawing Layer 2 graphics on the screen. |
Layer 2 Y Offset Register | $17 | Yes | Yes | Sets the Y offset used when drawing Layer 2 graphics on the screen. |
Clip Window Layer 2 Register | $18 | Yes | Yes | Sets and reads clip-window for Layer 2. |
Clip Window Sprites Register | $19 | Yes | Yes | Sets and reads clip-window for Sprites |
Clip Window ULA/LoRes Register | $1A | Yes | Yes | Sets and reads clip-window for ULA/LoRes layer. |
Clip Window Tilemap Register | $1B | Yes | Yes | Sets and reads clip-window for Tilemap. |
Clip Window Control Register | $1C | Yes | Yes | Controls (resets) the clip-window registers indices. |
Active Video Line MSB Register | $1E | Yes | No | Holds the MSB (only, as bit 0) of the raster line currently being drawn. |
Active Video Line LSB Register | $1F | Yes | No | Holds the eight LSBs of the raster line currently being drawn. |
Video Line Interrupt Control Register | $22 | Yes | Yes | Controls the timing of raster interrupts and the ULA frame interrupt. |
Video Line Interrupt Value Register | $23 | Yes | Yes | Holds the eight LSBs of the line on which a raster interrupt should occur. |
ULA X Offset Register | $26 | Yes | Yes | Pixel X offset (0..255) to use when drawing ULA Layer. |
ULA Y Offset Register | $27 | Yes | Yes | Pixel Y offset (0..191) to use when drawing ULA Layer. |
Keymap High Address Register | $28 | Yes | Yes | PS/2 Keymap address MSB, read (pending) first byte of palette colour |
Keymap Low Address Register | $29 | No | Yes | PS/2 Keymap address LSB. |
Keymap High Data Register | $2A | No | Yes | High data to PS/2 Keymap (MSB of data in bit 0) |
Keymap Low Data Register | $2B | No | Yes | Low eight LSBs of PS/2 Keymap data. |
DAC B (left) mirror Register | $2C | Yes | Yes | DAC B mirror, read current I2S left MSB |
DAC A+D (mono) mirror Register | $2D | Yes | Yes | SpecDrum port 0xDF / DAC A+D mirror, read current I2S LSB |
DAC C (right) mirror Register | $2E | Yes | Yes | DAC C mirror, read current I2S right MSB |
Tilemap Offset X MSB Register | $2F | Yes | Yes | Sets the pixel offset (two high bits) used for drawing Tilemap graphics on the screen. |
Tilemap Offset X LSB Register | $30 | Yes | Yes | Sets the pixel offset (eight low bits) used for drawing Tilemap graphics on the screen. |
Tilemap Offset Y Register | $31 | Yes | Yes | Sets the pixel offset used for drawing Tilemap graphics on the screen. |
LoRes X Offset Register | $32 | Yes | Yes | Pixel X offset (0..255) to use when drawing LoRes Layer. |
LoRes Y Offset Register | $33 | Yes | Yes | Pixel Y offset (0..191) to use when drawing LoRes Layer. |
Sprite port-mirror Index Register | $34 | Yes | Yes | Selects sprite index 0..127 to be affected by writes to other Sprite ports (and mirrors). |
Sprite port-mirror Attribute 0 Register | $35 | No | Yes | Nextreg port-mirror to write directly into "byte 1" of Sprite Attribute Upload ($xx57 / 87). |
Sprite port-mirror Attribute 1 Register | $36 | No | Yes | Nextreg port-mirror to write directly into "byte 2" of Sprite Attribute Upload ($xx57 / 87). |
Sprite port-mirror Attribute 2 Register | $37 | No | Yes | Nextreg port-mirror to write directly into "byte 3" of Sprite Attribute Upload ($xx57 / 87). |
Sprite port-mirror Attribute 3 Register | $38 | No | Yes | Nextreg port-mirror to write directly into "byte 4" of Sprite Attribute Upload ($xx57 / 87). |
Sprite port-mirror Attribute 4 Register | $39 | No | Yes | Nextreg port-mirror to write directly into "byte 5" of Sprite Attribute Upload ($xx57 / 87). |
Palette Index Register | $40 | Yes | Yes | Chooses an palette element (index) to manipulate with |
Palette Value Register | $41 | Yes | Yes | Use to set/read 8-bit colours of the ULANext palette. |
Enhanced ULA Ink Color Mask | $42 | Yes | Yes | Specifies mask to extract ink colour from attribute cell value in ULANext mode. |
Enhanced ULA Control Register | $43 | Yes | Yes | Enables or disables Enhanced ULA interpretation of attribute values and toggles active palette. |
Enhanced ULA Palette Extension | $44 | Yes | Yes | Use to set 9-bit (2-byte) colours of the Enhanced ULA palette, or to read second byte of colour. |
Transparency colour fallback Register | $4A | Yes | Yes | 8-bit colour to be used when all layers contain transparent pixel. |
Sprites Transparency Index Register | $4B | Yes | Yes | Index into sprite palette (of "transparent" colour). |
Tilemap Transparency Index Register | $4C | Yes | Yes | Index into Tilemap palette (of "transparent" colour). |
Memory management slot 0 bank | $50 | Yes | Yes | Selects the 8k-bank stored in 8k-slot 0 (see Memory map). |
Memory management slot 1 bank | $51 | Yes | Yes | Selects the 8k-bank stored in 8k-slot 1 (see Memory map). |
Memory management slot 2 bank | $52 | Yes | Yes | Selects the 8k-bank stored in 8k-slot 2 (see Memory map). |
Memory management slot 3 bank | $53 | Yes | Yes | Selects the 8k-bank stored in 8k-slot 3 (see Memory map). |
Memory management slot 4 bank | $54 | Yes | Yes | Selects the 8k-bank stored in 8k-slot 4 (see Memory map). |
Memory management slot 5 bank | $55 | Yes | Yes | Selects the 8k-bank stored in 8k-slot 5 (see Memory map). |
Memory management slot 6 bank | $56 | Yes | Yes | Selects the 8k-bank stored in 8k-slot 6 (see Memory map). |
Memory management slot 7 bank | $57 | Yes | Yes | Selects the 8k-bank stored in 8k-slot 7 (see Memory map). |
Copper Data | $60 | No | Yes | Used to upload code to the Copper. |
Copper Control Low Byte | $61 | Yes | Yes | Holds low byte of Copper control bits. |
Copper Control High Byte | $62 | Yes | Yes | Holds high byte of Copper control flags. |
Copper Data 16-bit Write Register | $63 | No | Yes | Used to upload code to the Copper. |
Vertical Video Line Offset Register | $64 | Yes | Yes | Offset numbering of raster lines in copper/interrupt/active register |
ULA Control Register | $68 | Yes | Yes | Disable ULA, controls ULA mixing/blending, enable ULA+ |
Display Control 1 Register | $69 | Yes | Yes | Layer2, ULA shadow, Timex $FF port |
LoRes Control Register | $6A | Yes | Yes | LoRes Radastan mode |
Tilemap Control Register | $6B | Yes | Yes | Controls Tilemap mode. |
Default Tilemap Attribute Register | $6C | Yes | Yes | Default tile attribute for 8-bit only maps. |
Tilemap Base Address Register | $6E | Yes | Yes | Base address of the 40x32 or 80x32 tile map (similar to text-mode of other computers). |
Tile Definitions Base Address Register | $6F | Yes | Yes | Base address of the tiles' graphics. |
Layer 2 Control Register | $70 | Yes | Yes | Layer 2 resolution, palette offset |
Layer 2 X Offset MSB Register | $71 | Yes | Yes | Sets the pixel offset used for drawing Layer 2 graphics on the screen. |
Sprite port-mirror Attribute 0 (with INC) Register | $75 | No | Yes | Same as Sprite port-mirror Attribute 0 Register ($35) (write first byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34) |
Sprite port-mirror Attribute 1 (with INC) Register | $76 | No | Yes | Same as Sprite port-mirror Attribute 1 Register ($36) (write second byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34) |
Sprite port-mirror Attribute 2 (with INC) Register | $77 | No | Yes | Same as Sprite port-mirror Attribute 2 Register ($37) (write third byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34) |
Sprite port-mirror Attribute 3 (with INC) Register | $78 | No | Yes | Same as Sprite port-mirror Attribute 3 Register ($38) (write fourth byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34) |
Sprite port-mirror Attribute 4 (with INC) Register | $79 | No | Yes | The same as Sprite port-mirror Attribute 4 Register ($39) (write fifth byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34) |
User Storage 0 Register | $7F | Yes | Yes | 8-bit storage for user |
Expansion Bus Enable Register | $80 | Yes | Yes | Expansion bus enable/config |
Expansion Bus Control Register | $81 | Yes | Yes | Expansion bus controls |
Internal Port Decoding b0-7 Register | $82 | Yes | Yes | Enabling internal ports decoding |
Internal Port Decoding b8-15 Register | $83 | Yes | Yes | Enabling internal ports decoding |
Internal Port Decoding b16-23 Register | $84 | Yes | Yes | Enabling internal ports decoding |
Internal Port Decoding b24-31 Register | $85 | Yes | Yes | Enabling internal ports decoding |
Expansion Bus Decoding b0-7 Register | $86 | Yes | Yes | When expansion bus is enabled: Internal ports decoding mask |
Expansion Bus Decoding b8-15 Register | $87 | Yes | Yes | When expansion bus is enabled: Internal ports decoding mask |
Expansion Bus Decoding b16-23 Register | $88 | Yes | Yes | When expansion bus is enabled: Internal ports decoding mask |
Expansion Bus Decoding b24-31 Register | $89 | Yes | Yes | When expansion bus is enabled: Internal ports decoding mask |
Expansion Bus I/O Propagate Register | $8A | Yes | Yes | Monitoring internal I/O or adding external keyboard |
Alternate ROM | $8C | Yes | Yes | Enable alternate ROM or lock 48k ROM |
Memory Mapping Register | $8E | Yes | Yes | Control classic Spectrum memory mapping |
Pi GPIO Output Enable Register | $90-$93 | Yes | Yes | Enables GPIO pins output |
Pi GPIO Register | $98-$9B | Yes | Yes | GPIO pins mapped to Next Register |
Pi Peripheral Enable Register | $A0 | Yes | Yes | Enable Pi peripherals: UART, Pi hats, I2C, SPI |
Pi I2S Audio Control Register | $A2 | Yes | Yes | Pi I2S controls |
Pi I2S Clock Divide Register | $A3 | Yes | Yes | Pi I2S clock divide in master mode. |
ESP WiFi GPIO Output Register | $A8 | Yes | Yes | ESP WiFi GPIO Output |
ESP WiFi GPIO Register | $A9 | Yes | Yes | ESP WiFi GPIO Read/Write |
Extended Keys 0 Register | $B0 | Yes | No | Read Next keyboard compound keys separately |
Extended Keys 1 Register | $B1 | Yes | No | Read Next keyboard compound keys separately |
DivMMC Trap Enable 1 Register | $B2 | Yes | Yes | DivMMC trap configuration |
DivMMC Trap Enable 2 Register | $B4 | Yes | Yes | DivMMC trap configuration |
Debug LED Control Register | $FF | No | Yes | Turns debug LEDs on and off on TBBlue implementations that have them. |