Board feature control

This is a general list of ports and registers used to control features on the Spectrum Next board.

Note that these lists are automatically generated and not directly editable. To edit data on a port or register, visit its page. To add a new port, click here. To add a new register, click here.

Mapped Spectrum Ports

	Number	Mask	Description
Keyboard	$**FE	%xxxx xxxx ---- ---0 where only one bit in x is 0	Series of specific ports that read keyboard key presses.
I2C clock	$103B	%0001 0000 0011 1011 ??	Sets and reads the I2C SCL line.
I2C data	$113B	%0001 0001 0011 1011 ??	Sets and reads the I2C SDA line
Layer 2 Access Port	$123B	%0001 0010 0011 1011 ??	Enables Layer 2 and controls paging of layer 2 screen into lower memory.
UART TX	$133B	%0001 0011 0011 1011	Sends byte to serial port. If read, tells if data in RX buffer
UART RX	$143B	%0001 0100 0011 1011	Reads data from serial port, write sets the baudrate
UART Control	$153B	%0001 0101 0011 1011	Configuration of UART interfaces
UART Frame	$163B	%0001 0110 0011 1011	UART Frame
CTC Channels	$183B	%0001 1XXX 0011 1011	CTC 8 channels 0x183b - 0x1f3b
Plus 3 Memory Paging Control	$1FFD	%0001 ---- ---- --0-	Controls ROM paging and special paging options from the +2a/+3.
TBBlue Register Select	$243B	%0010 0100 0011 1011	Selects active port for TBBlue/Next feature configuration.
TBBlue Register Access	$253B	%0010 0101 0011 1011	Reads and/or writes the selected TBBlue control register.
Sprite Status/Slot Select	$303B	%0011 0000 0011 1011 ??	Sets active sprite-attribute index and pattern-slot index, reads sprite status.
Memory Paging Control	$7FFD	%01-- ---- ---- --0-	Selects active RAM, ROM, and displayed screen.
AY Info	$BFF5	1011111111110101	AY information
Sound Chip Register Write	$BFFD	%10-- ---- ---- --0-	Writes to the selected register of the selected sound chip.
Next Memory Bank Select	$DFFD	%1101 1111 1111 1101	Provides additional bank select bits for extended memory.
DIVMMC	$E3		Divmmc control
Pentagon 1024 paging	$EFF7	1110111111110111	Paging in Pentagon 1024K mode
Kempston Mouse Buttons	$FADF	%---- ---0 --0- ----	Reads buttons on Kempston Mouse.
Kempston Mouse X	$FBDF	%---- -0-1 --0- ----	X coordinate of Kempston Mouse, 0-255.
Kempston Mouse Y	$FFDF	%---- -1-1 --0- ----	Y coordinate of Kempston Mouse, 0-192.
Turbo Sound Next Control	$FFFD	%11-- ---- ---- --0-	Controls stereo channels and selects active sound chip and sound chip channel.
MB02 DMA Port	$xx0B	---- ---- 0000 1011	Controls Z8410 DMA chip via MB02 standard.
Kempston Joystick	$xx1F	%---- ---- 0001 1111	Reads movement of joysticks using Kempston interface.
Kempston Joystick 2, Joystick I/O	$xx37		Kempston interface second joystick variant and controls joystick I/O.
Sprite Attribute Upload	$xx57	%---- ---- 0101 0111	Uploads sprite positions, visibility, colour type and effect flags.
Sprite Pattern Upload	$xx5B	%---- ---- 0101 1011 ??	Used to upload the pattern of the selected sprite.
Datagear DMA Port	$xx6B	---- ---- 0110 1011	Controls zxnDMA chip
SpecDrum DAC Output	$xxDF	%---- ---- --01 1111	Output to SpecDrum DAC.
ULA Control Port	$xxFE		Controls border color and base Spectrum audio settings.
Timex Sinclair Video Mode Control	$xxFF		Controls Timex Sinclair video modes and colours in hi-res mode.

Next/TBBlue Feature Control Registers

Specific features of the Next are controlled via these register numbers, accessed via TBBlue Register Select ($243B / 9275) and TBBlue Register Access ($253B / 9531), or via the NEXTREG opcode.

	Number	Readable	Writable	Description
Machine ID Register	$00	true	false	Identifies TBBlue board type. Should always be 10 (binary 0000 1010) on Next.
Core Version Register	$01	true	false	Identifies core (FPGA image) version.
Next Reset Register	$02	true	true	Identifies type of last reset. Can be written to force reset.
Machine Type Register	$03	true	true	Identifies timing and machine type.
Config Mapping Register	$04	false	true	In config mode, allows RAM to be mapped to ROM area.
Peripheral 1 Register	$05	true	true	Sets joystick mode, video frequency and Scandoubler.
Peripheral 2 Register	$06	true	true	Enables CPU Speed key, DivMMC, Multiface, Mouse and AY audio.
CPU Speed Register	$07	true	true	Sets CPU Speed, reads actual speed.
Peripheral 3 Register	$08	true	true	ABC/ACB Stereo, Internal Speaker, SpecDrum, Timex Video Modes, Turbo Sound Next, RAM contention and [un]lock 128k paging.
Peripheral 4 Register	$09	true	true	Sets scanlines, AY mono output, Sprite-id lockstep, reset DivMMC mapram and disable HDMI audio.
Peripheral 5 Register	$0A	true	true	Multiface type, Divmmc automap, Mouse buttons and DPI config
Joystick I/O Mode	$0B	true	true	Joystick port I/O control
Core Version Register (sub minor)	$0E	true	false	Identifies core (FPGA image) version (sub minor number).
Board ID	$0F	true	false	Spectrum next issue ID
Anti-brick Register	$10	true	true	Used within the Anti-brick system.
Video Timing Register	$11	true	true	Sets video output timing variant.
Layer 2 RAM Page Register	$12	true	true	Sets the bank number where Layer 2 video memory begins.
Layer 2 RAM Shadow Page Register	$13	true	true	Sets the bank number where the Layer 2 shadow screen begins.
Global Transparency Register	$14	true	true	Sets the "transparent" colour for Layer 2, ULA and LoRes pixel data.
Sprite and Layers System Register	$15	true	true	Enables/disables Sprites and Lores Layer, and chooses priority of sprites and Layer 2.
Layer 2 X Offset Register	$16	true	true	Sets the pixel offset used for drawing Layer 2 graphics on the screen.
Layer 2 Y Offset Register	$17	true	true	Sets the Y offset used when drawing Layer 2 graphics on the screen.
Clip Window Layer 2 Register	$18	true	true	Sets and reads clip-window for Layer 2.
Clip Window Sprites Register	$19	true	true	Sets and reads clip-window for Sprites
Clip Window ULA/LoRes Register	$1A	true	true	Sets and reads clip-window for ULA/LoRes layer.
Clip Window Tilemap Register	$1B	true	true	Sets and reads clip-window for Tilemap.
Clip Window Control Register	$1C	true	true	Controls (resets) the clip-window registers indices.
Active Video Line MSB Register	$1E	true	false	Holds the MSB (only, as bit 0) of the raster line currently being drawn.
Active Video Line LSB Register	$1F	true	false	Holds the eight LSBs of the raster line currently being drawn.
Generate Maskable Interrupt	$20	true	true	Trigger interrupt
Video Line Interrupt Control Register	$22	true	true	Controls the timing of raster interrupts and the ULA frame interrupt.
Video Line Interrupt Value Register	$23	true	true	Holds the eight LSBs of the line on which a raster interrupt should occur.
Reserved	$24	false	false	n/a
ULA X Offset Register	$26	true	true	Pixel X offset (0..255) to use when drawing ULA Layer.
ULA Y Offset Register	$27	true	true	Pixel Y offset (0..191) to use when drawing ULA Layer.
Keymap High Address Register	$28	true	true	PS/2 Keymap address MSB, read (pending) first byte of palette colour
Keymap Low Address Register	$29	false	true	PS/2 Keymap address LSB.
Keymap High Data Register	$2A	false	true	High data to PS/2 Keymap (MSB of data in bit 0)
Keymap Low Data Register	$2B	false	true	Low eight LSBs of PS/2 Keymap data.
DAC B (left) mirror Register	$2C	true	true	DAC B mirror, read current I2S left MSB
DAC A+D (mono) mirror Register	$2D	true	true	SpecDrum port 0xDF / DAC A+D mirror, read current I2S LSB
DAC C (right) mirror Register	$2E	true	true	DAC C mirror, read current I2S right MSB
Tilemap Offset X MSB Register	$2F	true	true	Sets the pixel offset (two high bits) used for drawing Tilemap graphics on the screen.
Tilemap Offset X LSB Register	$30	true	true	Sets the pixel offset (eight low bits) used for drawing Tilemap graphics on the screen.
Tilemap Offset Y Register	$31	true	true	Sets the pixel offset used for drawing Tilemap graphics on the screen.
LoRes X Offset Register	$32	true	true	Pixel X offset (0..255) to use when drawing LoRes Layer.
LoRes Y Offset Register	$33	true	true	Pixel Y offset (0..191) to use when drawing LoRes Layer.
Sprite port-mirror Index Register	$34	true	true	Selects sprite index 0..127 to be affected by writes to other Sprite ports (and mirrors).
Sprite port-mirror Attribute 0 Register	$35	false	true	Nextreg port-mirror to write directly into "byte 1" of Sprite Attribute Upload ($xx57 / 87).
Sprite port-mirror Attribute 1 Register	$36	false	true	Nextreg port-mirror to write directly into "byte 2" of Sprite Attribute Upload ($xx57 / 87).
... further results