Active Video Line LSB Register | $1F | true | false | Holds the eight LSBs of the raster line currently being drawn. |
Active Video Line MSB Register | $1E | true | false | Holds the MSB (only, as bit 0) of the raster line currently being drawn. |
Alternate ROM | $8C | true | true | Enable alternate ROM or lock 48k ROM |
Anti-brick Register | $10 | true | true | Used within the Anti-brick system. |
CPU Speed Register | $07 | true | true | Sets CPU Speed, reads actual speed. |
Clip Window Control Register | $1C | true | true | Controls (resets) the clip-window registers indices. |
Clip Window Layer 2 Register | $18 | true | true | Sets and reads clip-window for Layer 2. |
Clip Window Sprites Register | $19 | true | true | Sets and reads clip-window for Sprites |
Clip Window Tilemap Register | $1B | true | true | Sets and reads clip-window for Tilemap. |
Clip Window ULA/LoRes Register | $1A | true | true | Sets and reads clip-window for ULA/LoRes layer. |
Config Mapping Register | $04 | false | true | In config mode, allows RAM to be mapped to ROM area. |
Copper Control High Byte | $62 | true | true | Holds high byte of Copper control flags. |
Copper Control Low Byte | $61 | true | true | Holds low byte of Copper control bits. |
Copper Data | $60 | false | true | Used to upload code to the Copper. |
Copper Data 16-bit Write Register | $63 | false | true | Used to upload code to the Copper. |
Core Version Register | $01 | true | false | Identifies core (FPGA image) version. |
Core Version Register (sub minor) | $0E | true | false | Identifies core (FPGA image) version (sub minor number). |
DAC A+D (mono) mirror Register | $2D | true | true | SpecDrum port 0xDF / DAC A+D mirror, read current I2S LSB |
DAC B (left) mirror Register | $2C | true | true | DAC B mirror, read current I2S left MSB |
DAC C (right) mirror Register | $2E | true | true | DAC C mirror, read current I2S right MSB |
Debug LED Control Register | $FF | false | true | Turns debug LEDs on and off on TBBlue implementations that have them. |
Default Tilemap Attribute Register | $6C | true | true | Default tile attribute for 8-bit only maps. |
Display Control 1 Register | $69 | true | true | Layer2, ULA shadow, Timex $FF port |
DivMMC Trap Enable 1 Register | $B2 | true | true | DivMMC trap configuration |
DivMMC Trap Enable 2 Register | $B4 | true | true | DivMMC trap configuration |
ESP WiFi GPIO Output Register | $A8 | true | true | ESP WiFi GPIO Output |
ESP WiFi GPIO Register | $A9 | true | true | ESP WiFi GPIO Read/Write |
Enhanced ULA Control Register | $43 | true | true | Enables or disables Enhanced ULA interpretation of attribute values and toggles active palette. |
Enhanced ULA Ink Color Mask | $42 | true | true | Specifies mask to extract ink colour from attribute cell value in ULANext mode. |
Enhanced ULA Palette Extension | $44 | true | true | Use to set 9-bit (2-byte) colours of the Enhanced ULA palette, or to read second byte of colour. |
Expansion Bus Control Register | $81 | true | true | Expansion bus controls |
Expansion Bus Decoding b0-7 Register | $86 | true | true | When expansion bus is enabled: Internal ports decoding mask |
Expansion Bus Decoding b16-23 Register | $88 | true | true | When expansion bus is enabled: Internal ports decoding mask |
Expansion Bus Decoding b24-31 Register | $89 | true | true | When expansion bus is enabled: Internal ports decoding mask |
Expansion Bus Decoding b8-15 Register | $87 | true | true | When expansion bus is enabled: Internal ports decoding mask |
Expansion Bus Enable Register | $80 | true | true | Expansion bus enable/config |
Expansion Bus I/O Propagate Register | $8A | true | true | Monitoring internal I/O or adding external keyboard |
Extended Keys 0 Register | $B0 | true | false | Read Next keyboard compound keys separately |
Extended Keys 1 Register | $B1 | true | false | Read Next keyboard compound keys separately |
Global Transparency Register | $14 | true | true | Sets the "transparent" colour for Layer 2, ULA and LoRes pixel data. |
Internal Port Decoding b0-7 Register | $82 | true | true | Enabling internal ports decoding |
Internal Port Decoding b16-23 Register | $84 | true | true | Enabling internal ports decoding |
Internal Port Decoding b24-31 Register | $85 | true | true | Enabling internal ports decoding |
Internal Port Decoding b8-15 Register | $83 | true | true | Enabling internal ports decoding |
Keymap High Address Register | $28 | true | true | PS/2 Keymap address MSB, read (pending) first byte of palette colour |
Keymap High Data Register | $2A | false | true | High data to PS/2 Keymap (MSB of data in bit 0) |
Keymap Low Address Register | $29 | false | true | PS/2 Keymap address LSB. |
Keymap Low Data Register | $2B | false | true | Low eight LSBs of PS/2 Keymap data. |
Layer 2 Control Register | $70 | true | true | Layer 2 resolution, palette offset |
Layer 2 RAM Page Register | $12 | true | true | Sets the bank number where Layer 2 video memory begins. |