Search by property

This page provides a simple browsing interface for finding entities described by a property and a named value. Other available search interfaces include the page property search, and the ask query builder.

List of results

• DAC C (right) mirror Register  + (DAC C mirror, read current I2S right MSB)
• Default Tilemap Attribute Register  + (Default tile attribute for 8-bit only maps.)
• ULA Control Register  + (Disable ULA, controls ULA mixing/blending, enable ULA+)
• Divmmc Entry Points 0  + (DivMMC automap control)
• Divmmc Entry Points 1  + (DivMMC automap control)
• Divmmc Entry Points Valid 0  + (DivMMC entry point validity)
• DIVMMC  + (Divmmc control)
• ESP WiFi GPIO Output Register  + (ESP WiFi GPIO Output)
• ESP WiFi GPIO Register  + (ESP WiFi GPIO Read/Write)
• Pi Peripheral Enable Register  + (Enable Pi peripherals: UART, Pi hats, I2C, SPI)
• Alternate ROM  + (Enable alternate ROM or lock 48k ROM)
• Pi GPIO Output Enable Register  + (Enables GPIO pins output)
• Peripheral 2 Register  + (Enables [[CPU Speed control|CPU Speed key]], [[DivMMC]], [[Multiface]], [[Mouse]] and [[AY|AY audio]].)
• Layer 2 Access Port  + (Enables [[Layer 2]] and controls paging of layer 2 screen into lower memory.)
• Enhanced ULA Control Register  + (Enables or disables Enhanced ULA interpretation of attribute values and toggles active palette.)
• Sprite and Layers System Register  + (Enables/disables [[Sprites]] and [[Video_Modes#LoRes_Layer.2FRadasjimian_Mode|Lores Layer]], and chooses priority of sprites and [[Layer 2]].)
• Internal Port Decoding b16-23 Register  + (Enabling internal ports decoding)
• Internal Port Decoding b24-31 Register  + (Enabling internal ports decoding)
• Internal Port Decoding b8-15 Register  + (Enabling internal ports decoding)
• Internal Port Decoding b0-7 Register  + (Enabling internal ports decoding)
• Expansion Bus Control Register  + (Expansion bus controls)

• Expansion Bus Enable Register  + (Expansion bus enable/config)

• Pi GPIO Register  + (GPIO pins mapped to Next Register)
• Interrupt Status 2  + (Has UART interrupt happened?)
• Keymap High Data Register  + (High data to PS/2 Keymap (MSB of data in bit 0))
• Copper Control High Byte  + (Holds high byte of [[Copper]] control flags.)
• Copper Control Low Byte  + (Holds low byte of [[Copper]] control bits.)
• Active Video Line MSB Register  + (Holds the MSB (only, as bit 0) of the raster line currently being drawn.)
• Video Line Interrupt Value Register  + (Holds the eight LSBs of the line on which a raster interrupt should occur.)
• Active Video Line LSB Register  + (Holds the eight LSBs of the raster line currently being drawn.)
• Machine ID Register  + (Identifies [[TBBlue]] board type. Should always be 10 (binary 0000 1010) on Next.)
• Core Version Register (sub minor)  + (Identifies core (FPGA image) version (sub minor number).)
• Core Version Register  + (Identifies core (FPGA image) version.)
• Machine Type Register  + (Identifies timing and machine type.)
• Next Reset Register  + (Identifies type of last reset. Can be written to force reset.)
• Config Mapping Register  + (In config mode, allows RAM to be mapped to ROM area.)
• Tilemap Transparency Index Register  + (Index into Tilemap palette (of "transparent" colour).)
• Sprites Transparency Index Register  + (Index into sprite palette (of "transparent" colour).)
• Interrupt Enable 0  + (Interrupt type enable control)
• DMA interrupt enable 0  + (Interrupts that can override DMA)
• XDEV command  + (Issue 4 only)
• XADC register  + (Issue 4 only)
• XADC D0  + (Issue 4 only)
• XADC D1  + (Issue 4 only)
• Joystick I/O Mode  + (Joystick port I/O control)
• Kempston Joystick 2, Joystick I/O  + (Kempston interface second joystick variant and controls joystick I/O.)
• NMI Return Address LSB  + (LSB of NMI return address)