ESP WiFi GPIO Output Register
From SpecNext official Wiki
| Number | $A8 |
|---|---|
| Readable | Yes |
| Writable | Yes |
| Short Description | ESP WiFi GPIO Output |
(soft reset = 0)
bit 2 = GPIO2 output enable (fixed at 0, GPIO2 is read-only) bit 0 = GPIO0 output enable
(new register since core3.1.0)