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This page provides a simple browsing interface for finding entities described by a property and a named value. Other available search interfaces include the page property search, and the ask query builder.
List of results
- DMA interrupt enable 1 + (CTC Interrupts that can override DMA)
- Palette Index Register + (Chooses an palette element (index) to manipulate with)
- UART Control + (Configuration of UART interfaces)
- Memory Mapping Register + (Control classic 128K Spectrum memory mapping)
- Clip Window Control Register + (Controls (resets) the clip-window registers indices.)
- Plus 3 Memory Paging Control + (Controls ROM paging and special paging options from the +2a/+3.)
- Timex Sinclair Video Mode Control + (Controls Timex Sinclair video modes and colours in hi-res mode.)
- MB02 DMA Port + (Controls Z8410 DMA chip via MB02 standard.)
- Tilemap Control Register + (Controls [[Tilemap]] mode.)
- ULA Control Port + (Controls border color and base Spectrum audio settings.)
- Turbo Sound Next Control + (Controls stereo channels and selects active sound chip and sound chip channel.)
- Video Line Interrupt Control Register + (Controls the timing of raster interrupts and the ULA frame interrupt.)
- Datagear DMA Port + (Controls zxnDMA chip)
- DAC B (left) mirror Register + (DAC B mirror, read current I2S left MSB)
- DAC C (right) mirror Register + (DAC C mirror, read current I2S right MSB)
- Default Tilemap Attribute Register + (Default tile attribute for 8-bit only maps.)
- ULA Control Register + (Disable ULA, controls ULA mixing/blending, enable ULA+)
- Divmmc Entry Points 0 + (DivMMC automap control)
- Divmmc Entry Points 1 + (DivMMC automap control)
- Divmmc Entry Points Valid 0 + (DivMMC entry point validity)
- DIVMMC + (Divmmc control)
- ESP WiFi GPIO Output Register + (ESP WiFi GPIO Output)
- ESP WiFi GPIO Register + (ESP WiFi GPIO Read/Write)
- Pi Peripheral Enable Register + (Enable Pi peripherals: UART, Pi hats, I2C, SPI)
- Alternate ROM + (Enable alternate ROM or lock 48k ROM)
- Pi GPIO Output Enable Register + (Enables GPIO pins output)
- Peripheral 2 Register + (Enables [[CPU Speed control|CPU Speed key]], [[DivMMC]], [[Multiface]], [[Mouse]] and [[AY|AY audio]].)
- Layer 2 Access Port + (Enables [[Layer 2]] and controls paging of layer 2 screen into lower memory.)
- Enhanced ULA Control Register + (Enables or disables Enhanced ULA interpretation of attribute values and toggles active palette.)
- Sprite and Layers System Register + (Enables/disables [[Sprites]] and [[Video_Modes#LoRes_Layer.2FRadasjimian_Mode|Lores Layer]], and chooses priority of sprites and [[Layer 2]].)
- Internal Port Decoding b16-23 Register + (Enabling internal ports decoding)
- Internal Port Decoding b24-31 Register + (Enabling internal ports decoding)
- Internal Port Decoding b8-15 Register + (Enabling internal ports decoding)
- Internal Port Decoding b0-7 Register + (Enabling internal ports decoding)
- Expansion Bus Control Register + (Expansion bus controls)
- Expansion Bus Enable Register + (Expansion bus enable/config)
- Pi GPIO Register + (GPIO pins mapped to Next Register)
- Interrupt Status 2 + (Has UART interrupt happened?)
- Keymap High Data Register + (High data to PS/2 Keymap (MSB of data in bit 0))