Interrupt Status 0 Register: Difference between revisions
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updated to 78a6ee50 |
m Xalior moved page Interrupt Status 0 to Interrupt Status 0 Register: match formal nextreg.txt name |
(No difference)
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Latest revision as of 12:42, 14 October 2025
| Number | TBRegisterNumber::$C8 |
|---|---|
| Readable | TBRegisterReadable::Yes |
| Writable | TBRegisterWritable::Yes |
| Short Description | ShortDesc::has interrupt occurred? |
bits 7:2 = Reserved must be 0 bit 1 = Line bit 0 = ULA
- (R) Set bits indicate the device generated an interrupt in the past or an interrupt is pending
- (W) Set bits clear the status. In hw im2 mode the status will continue to read as set until the interrupt pending condition is cleared