Semantic search

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Condition
Printout selection
Options
Parameters [
limit:

The maximum number of results to return
offset:

The offset of the first result
link:

Show values as links
headers:

Display the headers/property names
mainlabel:

The label to give to the main page name
intro:

The text to display before the query results, if there are any
outro:

The text to display after the query results, if there are any
searchlabel:

Text for continuing the search
default:

The text to display if there are no query results
class:

An additional CSS class to set for the table
transpose:

Display table headers vertically and results horizontally
sep:

The separator between results
Sort options
Delete
Add sorting condition
SQLStore debug output
ASK Query
[[Category:Next Configuration Registers]]
SQL Query
SELECT DISTINCT
  t0.smw_id AS id,
  t0.smw_title AS t,
  t0.smw_namespace AS ns,
  t0.smw_iw AS iw,
  t0.smw_subobject AS so,
  t0.smw_sortkey AS sortkey, t0.smw_sort
FROM
  `smw_object_ids` AS t0
INNER JOIN
  `smw_fpt_inst` AS t1 ON t0.smw_id=t1.s_id
WHERE
  (t1.o_id='1168')
  AND t0.smw_iw!=':smw'
  AND t0.smw_iw!=':smw-delete'
  AND t0.smw_iw!=':smw-redi'
ORDER BY
  t0.smw_sort ASC
LIMIT
  55
OFFSET
  50
SQL Explain
IDselect_typetabletypepossible_keyskeykey_lenrefrowsExtra
1SIMPLEt1refs_id,o_id,s_id_2,o_id_2o_id_25const110Using index; Using temporary; Using filesort
1SIMPLEt0eq_refPRIMARY,smw_id,smw_iw,smw_iw_2PRIMARY4specnext_wiki.t1.s_id1Using where
Auxilliary Tables
No auxilliary tables used.
Query Metrics
Query-Size:1
Query-Depth:0
Errors and Warnings
None
 NumberReadableWritableDescription
Layer 2 RAM Shadow Page Register$13truetrueSets the bank number where the Layer 2 shadow screen begins.
Layer 2 X Offset MSB Register$71truetrueSets the pixel offset used for drawing Layer 2 graphics on the screen.
Layer 2 X Offset Register$16truetrueSets the pixel offset used for drawing Layer 2 graphics on the screen.
Layer 2 Y Offset Register$17truetrueSets the Y offset used when drawing Layer 2 graphics on the screen.
LoRes Control Register$6AtruetrueLoRes Radastan mode
LoRes X Offset Register$32truetruePixel X offset (0..255) to use when drawing LoRes Layer.
LoRes Y Offset Register$33truetruePixel Y offset (0..191) to use when drawing LoRes Layer.
Machine ID Register$00truefalseIdentifies TBBlue board type. Should always be 10 on Next.
Machine Type Register$03truetrueIdentifies timing and machine type.
Memory Mapping Register$8EtruetrueControl classic Spectrum memory mapping
Memory management slot 0 bank$50truetrueSelects the 8k-bank stored in 8k-slot 0 (see Memory map).
Memory management slot 1 bank$51truetrueSelects the 8k-bank stored in 8k-slot 1 (see Memory map).
Memory management slot 2 bank$52truetrueSelects the 8k-bank stored in 8k-slot 2 (see Memory map).
Memory management slot 3 bank$53truetrueSelects the 8k-bank stored in 8k-slot 3 (see Memory map).
Memory management slot 4 bank$54truetrueSelects the 8k-bank stored in 8k-slot 4 (see Memory map).
Memory management slot 5 bank$55truetrueSelects the 8k-bank stored in 8k-slot 5 (see Memory map).
Memory management slot 6 bank$56truetrueSelects the 8k-bank stored in 8k-slot 6 (see Memory map).
Memory management slot 7 bank$57truetrueSelects the 8k-bank stored in 8k-slot 7 (see Memory map).
Next Reset Register$02truetrueIdentifies type of last reset. Can be written to force reset.
Palette Index Register$40truetrueChooses an palette element (index) to manipulate with
Palette Value Register$41truetrueUse to set/read 8-bit colours of the ULANext palette.
Peripheral 1 Register$05truetrueSets joystick mode, video frequency and Scandoubler.
Peripheral 2 Register$06truetrueEnables CPU Speed key, DivMMC, Multiface, Mouse and AY audio.
Peripheral 3 Register$08truetrueABC/ACB Stereo, Internal Speaker, SpecDrum, Timex Video Modes, Turbo Sound Next, RAM contention and [un]lock 128k paging.
Peripheral 4 Register$09truetrueSets scanlines, AY mono output, Sprite-id lockstep, reset DivMMC mapram and disable HDMI audio.
Peripheral 5 Register$0AtruetrueMouse buttons and DPI config
Pi GPIO Output Enable Register$90-$93truetrueEnables GPIO pins output
Pi GPIO Register$98-$9BtruetrueGPIO pins mapped to Next Register
Pi I2S Audio Control Register$A2truetruePi I2S controls
Pi I2S Clock Divide Register$A3truetruePi I2S clock divide in master mode.
Pi Peripheral Enable Register$A0truetrueEnable Pi peripherals: UART, Pi hats, I2C, SPI
Sprite and Layers System Register$15truetrueEnables/disables Sprites and Lores Layer, and chooses priority of sprites and Layer 2.
Sprite port-mirror Attribute 0 (with INC) Register$75falsetrueSame as Sprite port-mirror Attribute 0 Register ($35) (write first byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34)
Sprite port-mirror Attribute 0 Register$35falsetrueNextreg port-mirror to write directly into "byte 1" of Sprite Attribute Upload ($xx57 / 87).
Sprite port-mirror Attribute 1 (with INC) Register$76falsetrueSame as Sprite port-mirror Attribute 1 Register ($36) (write second byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34)
Sprite port-mirror Attribute 1 Register$36falsetrueNextreg port-mirror to write directly into "byte 2" of Sprite Attribute Upload ($xx57 / 87).
Sprite port-mirror Attribute 2 (with INC) Register$77falsetrueSame as Sprite port-mirror Attribute 2 Register ($37) (write third byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34)
Sprite port-mirror Attribute 2 Register$37falsetrueNextreg port-mirror to write directly into "byte 3" of Sprite Attribute Upload ($xx57 / 87).
Sprite port-mirror Attribute 3 (with INC) Register$78falsetrueSame as Sprite port-mirror Attribute 3 Register ($38) (write fourth byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34)
Sprite port-mirror Attribute 3 Register$38falsetrueNextreg port-mirror to write directly into "byte 4" of Sprite Attribute Upload ($xx57 / 87).
Sprite port-mirror Attribute 4 (with INC) Register$79falsetrueThe same as Sprite port-mirror Attribute 4 Register ($39) (write fifth byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34)
Sprite port-mirror Attribute 4 Register$39falsetrueNextreg port-mirror to write directly into "byte 5" of Sprite Attribute Upload ($xx57 / 87).
Sprite port-mirror Index Register$34truetrueSelects sprite index 0..127 to be affected by writes to other Sprite ports (and mirrors).
Sprites Transparency Index Register$4BtruetrueIndex into sprite palette (of "transparent" colour).
Tile Definitions Base Address Register$6FtruetrueBase address of the tiles' graphics.
Tilemap Base Address Register$6EtruetrueBase address of the 40x32 or 80x32 tile map (similar to text-mode of other computers).
Tilemap Control Register$6BtruetrueControls Tilemap mode.
Tilemap Offset X LSB Register$30truetrueSets the pixel offset (eight low bits) used for drawing Tilemap graphics on the screen.
Tilemap Offset X MSB Register$2FtruetrueSets the pixel offset (two high bits) used for drawing Tilemap graphics on the screen.
Tilemap Offset Y Register$31truetrueSets the pixel offset used for drawing Tilemap graphics on the screen.