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SQLStore debug output
ASK Query
[[Category:Next Configuration Registers]]
SQL Query
SELECT DISTINCT
t0.smw_id AS id,
t0.smw_title AS t,
t0.smw_namespace AS ns,
t0.smw_iw AS iw,
t0.smw_subobject AS so,
t0.smw_sortkey AS sortkey, t4.o_hash
FROM
`smw_object_ids` AS t0
INNER JOIN
`smw_fpt_inst` AS t1 ON t0.smw_id=t1.s_id
INNER JOIN
`smw_di_blob` AS t4 ON t0.smw_id=t4.s_id
WHERE
(t1.o_id='1168')
AND (t4.p_id='1164')
AND t0.smw_iw!=':smw'
AND t0.smw_iw!=':smw-delete'
AND t0.smw_iw!=':smw-redi'
ORDER BY
t4.o_hash ASC
LIMIT
55
OFFSET
0
t0.smw_id AS id,
t0.smw_title AS t,
t0.smw_namespace AS ns,
t0.smw_iw AS iw,
t0.smw_subobject AS so,
t0.smw_sortkey AS sortkey, t4.o_hash
FROM
`smw_object_ids` AS t0
INNER JOIN
`smw_fpt_inst` AS t1 ON t0.smw_id=t1.s_id
INNER JOIN
`smw_di_blob` AS t4 ON t0.smw_id=t4.s_id
WHERE
(t1.o_id='1168')
AND (t4.p_id='1164')
AND t0.smw_iw!=':smw'
AND t0.smw_iw!=':smw-delete'
AND t0.smw_iw!=':smw-redi'
ORDER BY
t4.o_hash ASC
LIMIT
55
OFFSET
0
SQL Explain
ID | select_type | table | type | possible_keys | key | key_len | ref | rows | Extra |
---|---|---|---|---|---|---|---|---|---|
1 | SIMPLE | t4 | ref | s_id,s_id_2,p_id | p_id | 4 | const | 110 | Using temporary |
1 | SIMPLE | t1 | ref | s_id,o_id,s_id_2,o_id_2 | s_id_2 | 9 | specnext_wiki.t4.s_id,const | 1 | Using index |
1 | SIMPLE | t0 | eq_ref | PRIMARY,smw_id,smw_iw,smw_iw_2 | PRIMARY | 4 | specnext_wiki.t4.s_id | 1 | Using where |
Auxilliary Tables
No auxilliary tables used.Query Metrics
Query-Size:1Query-Depth:0
Errors and Warnings
NoneNumber | Readable | Writable | Description | |
---|---|---|---|---|
Machine ID Register | $00 | true | false | Identifies TBBlue board type. Should always be 10 on Next. |
Core Version Register | $01 | true | false | Identifies core (FPGA image) version. |
Next Reset Register | $02 | true | true | Identifies type of last reset. Can be written to force reset. |
Machine Type Register | $03 | true | true | Identifies timing and machine type. |
Config Mapping Register | $04 | false | true | In config mode, allows RAM to be mapped to ROM area. |
Peripheral 1 Register | $05 | true | true | Sets joystick mode, video frequency and Scandoubler. |
Peripheral 2 Register | $06 | true | true | Enables CPU Speed key, DivMMC, Multiface, Mouse and AY audio. |
CPU Speed Register | $07 | true | true | Sets CPU Speed, reads actual speed. |
Peripheral 3 Register | $08 | true | true | ABC/ACB Stereo, Internal Speaker, SpecDrum, Timex Video Modes, Turbo Sound Next, RAM contention and [un]lock 128k paging. |
Peripheral 4 Register | $09 | true | true | Sets scanlines, AY mono output, Sprite-id lockstep, reset DivMMC mapram and disable HDMI audio. |
Peripheral 5 Register | $0A | true | true | Mouse buttons and DPI config |
Core Version Register (sub minor) | $0E | true | false | Identifies core (FPGA image) version (sub minor number). |
Anti-brick Register | $10 | true | true | Used within the Anti-brick system. |
Video Timing Register | $11 | true | true | Sets video output timing variant. |
Layer 2 RAM Page Register | $12 | true | true | Sets the bank number where Layer 2 video memory begins. |
Layer 2 RAM Shadow Page Register | $13 | true | true | Sets the bank number where the Layer 2 shadow screen begins. |
Global Transparency Register | $14 | true | true | Sets the "transparent" colour for Layer 2, ULA and LoRes pixel data. |
Sprite and Layers System Register | $15 | true | true | Enables/disables Sprites and Lores Layer, and chooses priority of sprites and Layer 2. |
Layer 2 X Offset Register | $16 | true | true | Sets the pixel offset used for drawing Layer 2 graphics on the screen. |
Layer 2 Y Offset Register | $17 | true | true | Sets the Y offset used when drawing Layer 2 graphics on the screen. |
Clip Window Layer 2 Register | $18 | true | true | Sets and reads clip-window for Layer 2. |
Clip Window Sprites Register | $19 | true | true | Sets and reads clip-window for Sprites |
Clip Window ULA/LoRes Register | $1A | true | true | Sets and reads clip-window for ULA/LoRes layer. |
Clip Window Tilemap Register | $1B | true | true | Sets and reads clip-window for Tilemap. |
Clip Window Control Register | $1C | true | true | Controls (resets) the clip-window registers indices. |
Active Video Line MSB Register | $1E | true | false | Holds the MSB (only, as bit 0) of the raster line currently being drawn. |
Active Video Line LSB Register | $1F | true | false | Holds the eight LSBs of the raster line currently being drawn. |
Video Line Interrupt Control Register | $22 | true | true | Controls the timing of raster interrupts and the ULA frame interrupt. |
Video Line Interrupt Value Register | $23 | true | true | Holds the eight LSBs of the line on which a raster interrupt should occur. |
ULA X Offset Register | $26 | true | true | Pixel X offset (0..255) to use when drawing ULA Layer. |
ULA Y Offset Register | $27 | true | true | Pixel Y offset (0..191) to use when drawing ULA Layer. |
Keymap High Address Register | $28 | true | true | PS/2 Keymap address MSB, read (pending) first byte of palette colour |
Keymap Low Address Register | $29 | false | true | PS/2 Keymap address LSB. |
Keymap High Data Register | $2A | false | true | High data to PS/2 Keymap (MSB of data in bit 0) |
Keymap Low Data Register | $2B | false | true | Low eight LSBs of PS/2 Keymap data. |
DAC B (left) mirror Register | $2C | true | true | DAC B mirror, read current I2S left MSB |
DAC A+D (mono) mirror Register | $2D | true | true | SpecDrum port 0xDF / DAC A+D mirror, read current I2S LSB |
DAC C (right) mirror Register | $2E | true | true | DAC C mirror, read current I2S right MSB |
Tilemap Offset X MSB Register | $2F | true | true | Sets the pixel offset (two high bits) used for drawing Tilemap graphics on the screen. |
Tilemap Offset X LSB Register | $30 | true | true | Sets the pixel offset (eight low bits) used for drawing Tilemap graphics on the screen. |
Tilemap Offset Y Register | $31 | true | true | Sets the pixel offset used for drawing Tilemap graphics on the screen. |
LoRes X Offset Register | $32 | true | true | Pixel X offset (0..255) to use when drawing LoRes Layer. |
LoRes Y Offset Register | $33 | true | true | Pixel Y offset (0..191) to use when drawing LoRes Layer. |
Sprite port-mirror Index Register | $34 | true | true | Selects sprite index 0..127 to be affected by writes to other Sprite ports (and mirrors). |
Sprite port-mirror Attribute 0 Register | $35 | false | true | Nextreg port-mirror to write directly into "byte 1" of Sprite Attribute Upload ($xx57 / 87). |
Sprite port-mirror Attribute 1 Register | $36 | false | true | Nextreg port-mirror to write directly into "byte 2" of Sprite Attribute Upload ($xx57 / 87). |
Sprite port-mirror Attribute 2 Register | $37 | false | true | Nextreg port-mirror to write directly into "byte 3" of Sprite Attribute Upload ($xx57 / 87). |
Sprite port-mirror Attribute 3 Register | $38 | false | true | Nextreg port-mirror to write directly into "byte 4" of Sprite Attribute Upload ($xx57 / 87). |
Sprite port-mirror Attribute 4 Register | $39 | false | true | Nextreg port-mirror to write directly into "byte 5" of Sprite Attribute Upload ($xx57 / 87). |
Palette Index Register | $40 | true | true | Chooses an palette element (index) to manipulate with |