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	Number	Readable	Writable	Description
Machine ID Register	$00	true	false	Identifies TBBlue board type. Should always be 10 on Next.
Core Version Register	$01	true	false	Identifies core (FPGA image) version.
Next Reset Register	$02	true	true	Identifies type of last reset. Can be written to force reset.
Machine Type Register	$03	true	true	Identifies timing and machine type.
Config Mapping Register	$04	false	true	In config mode, allows RAM to be mapped to ROM area.
Peripheral 1 Register	$05	true	true	Sets joystick mode, video frequency and Scandoubler.
Peripheral 2 Register	$06	true	true	Enables CPU Speed key, DivMMC, Multiface, Mouse and AY audio.
CPU Speed Register	$07	true	true	Sets CPU Speed, reads actual speed.
Peripheral 3 Register	$08	true	true	ABC/ACB Stereo, Internal Speaker, SpecDrum, Timex Video Modes, Turbo Sound Next, RAM contention and [un]lock 128k paging.
Peripheral 4 Register	$09	true	true	Sets scanlines, AY mono output, Sprite-id lockstep, reset DivMMC mapram and disable HDMI audio.
Peripheral 5 Register	$0A	true	true	Mouse buttons and DPI config
Core Version Register (sub minor)	$0E	true	false	Identifies core (FPGA image) version (sub minor number).
Anti-brick Register	$10	true	true	Used within the Anti-brick system.
Video Timing Register	$11	true	true	Sets video output timing variant.
Layer 2 RAM Page Register	$12	true	true	Sets the bank number where Layer 2 video memory begins.
Layer 2 RAM Shadow Page Register	$13	true	true	Sets the bank number where the Layer 2 shadow screen begins.
Global Transparency Register	$14	true	true	Sets the "transparent" colour for Layer 2, ULA and LoRes pixel data.
Sprite and Layers System Register	$15	true	true	Enables/disables Sprites and Lores Layer, and chooses priority of sprites and Layer 2.
Layer 2 X Offset Register	$16	true	true	Sets the pixel offset used for drawing Layer 2 graphics on the screen.
Layer 2 Y Offset Register	$17	true	true	Sets the Y offset used when drawing Layer 2 graphics on the screen.