Property: Shortfx
From SpecNext official Wiki
E
A -= (IXY+d)* +
A -= HL* +
A := (nn)* +
A := A & (IXY+d)* +
A := A & HL* +
A := A & n +
A := A & r +
A := A OR (IXY+d)* +
A := A OR HL* +
A := A OR n +
A := A OR r +
A := A ^ (IXY+d)* +
A := A ^ HL* +
A := A ^ n +
A := A ^ r +
A := I; P/V:=IFF2 +
A := R; P/V:=IFF2 +
A := in(An) +
A+=(IXY+d)* +
A+=(IXY+d)*+(CF?1:0) +
A+=HL*+(CF?1:0) +
A+=n+(CF?1:0) +
A+=r+(CF?1:0) +
A-=((IXY+d)+(CF?1:0)) +
A-=(HL*+(CF?1:0)) +
A-=(IXY+d)? +
A-=(n+(CF?1:0)) +
A-=(r+(CF?1:0)) +
A:=A[3210]<<4 OR A[7654]>>4 +
A:=unsigned($80)>>(E&7) +
A[76543210]:=A[01234567] +
B--; if B!=0 PC+=nn +
B--; out(BC,HL*); HL++ +
B--; out(BC,HL*); HL-- +
CF:=!CF +
DE*:=HL*; DE++; HL++; BC-- +
DE*:=HL*; DE--; HL--; BC-- +
DE*:=HL*; INC L; INC D; +
DE:=DE<<(B&15) OR DE>>(16-B&15) +
DE:=DE<<(B&31) +
DE:=signed(DE)>>(B&31) +
DE:=unsigned(DE)>>(B&31) +
DE:=~(unsigned(~DE)>>(B&31)) +
HL := (nn)* +
HL* := r +
HL*:=(HL*<<1)+1 +
HL*:=HL* & (~(1<<b)) +
HL*:=HL* OR (1<<b) +
HL*:=HL*<<1 +
HL*:=HL*>>1 OR HL*[7] +
HL*:=in(BC); HL++; B-- +
HL*:=in(BC); HL--; B-- +
HL*:=unsigned(HL*)>>1 +
HL*==A?; HL++; BC-- +
HL*==A?; HL--; BC-- +
HL*[b]==1? +
HL+=rr+(CF?1:0) +
HL-=(rr+(CF?1:0)) +
HL:=$4000+((D&$C0)<<5)+((D&$07)<<8)+((D&$38)<<2)+(E>>3) +
HwNextReg_n:=A +
HwNextReg_n:=n' +
IFF1:=0; IFF2:=0 +
IFF1:=1; IFF2:=1 +
IFF1:=IFF2; PC:=SP*; SP+=2 +
Interrupt mode:=n +
PC:=HL (not PC:=HL*) +
PC:=IXY (not PC:=IXY*) +
PC:=PC&$C000+IN(C)<<6 +
PC:=SP*; SP+=2 +
PC:=SP*; SP+=2 +
SP := HL +
SP := IXY +
SP-=2; SP*:=PC; PC:=nn +
SP-=2; SP*:=nn +
SP-=2; SP*:=rr +
SP-=2; SP*:=rr +
do CPD while (!Z && BC>0) +
do CPI while (!Z && BC>0) +
do IND while(B>0) +
do INI while(B>0) +
do LDD while(BC>0) +
do LDDX while(BC>0) +
do LDI while(BC>0) +
do LDIX while(BC>0) +
do OUTD while (B>0) +
do OUTI while (B>0) +
do{t:=(HL&$FFF8+E&7)*; {if t!=A DE*:=t;} DE++; BC--}while(BC>0) +
if cc PC+=nn +
if cc {PC:=SP*; SP+=2} +
if cc {SP-=2; SP*:=PC; PC:=nn} +
if(A&$0F>$09 or HF) A±=$06; if(A&$F0>$90 or CF) A±=$60 (± depends on NF) +
if(HL&$0700!=$0700) HL+=256;<br>
else if(HL&$e0!=$e0) HL:=HL&$F8FF+$20;<br>
else HL:=HL&$F81F+$0800 +
out(An,A) +
out(BC,0) +
out(BC,HL*); HL++ +
out(BC,r) +
r := (IXY+d)* +
r := in(BC) +
r:=(r<<1)+1 +
r:=r & (~(1<<b)) +
r:=r OR (1<<b) +
r:=r<<1 +
r:=r>>1 OR r[7] +
r:=unsigned(r)>>1 +
r[b]==1? +
rr := (nn)* +
rr+=unsigned A +
rr:=SP*; SP+=2 +
rr:=SP*; SP+=2 +
rr:=SP*; SP+=2 +
swap(AF,AF') +
swap(BC,BC');swap(DE,DE');swap(HL,HL') +
swap(DE,HL) +
swap(SP*,HL) +
swap(SP*,IXY) +
waits for interrupt +
x:=(IX+d)*[0]; (IX+d)*:=(IX+d)*>>1; (IX+d)*[7]:=CF; CF:=x; r=(IX+d)* +
x:=(IX+d)*[0]; (IX+d)*:=(IX+d)*>>1; (IX+d)*[7]:=x; CF:=x; r:=(IX+d)* +
x:=(IX+d)*[7]; (IX+d)*:=(IX+d)*<<1; (IX+d)*[0]:=CF; CF:=x; r:=(IX+d)* +
x:=(IX+d)*[7]; (IX+d)*:=(IX+d)*<<1; (IX+d)*[0]:=x; CF:=x; r:=(IX+d)* +
x:=(IXY+d)*[0]; (IXY+d)*:=(IXY+d)*>>1; (IXY+d)*[7]:=CF; CF:=x +
x:=(IXY+d)*[0]; (IXY+d)*:=(IXY+d)*>>1; (IXY+d)*[7]:=x; CF:=x +
x:=(IXY+d)*[7]; (IXY+d)*:=(IXY+d)*<<1; (IXY+d)*[0]:=CF; CF:=x +
x:=(IXY+d)*[7]; (IXY+d)*:=(IXY+d)*<<1; (IXY+d)*[0]:=x; CF:=x +
x:=A[0]; A:=A>>1; A[7]:=CF; CF:=x +
x:=A[0]; A:=A>>1; A[7]:=x; CF:=x +
x:=A[7]; A:=A<<1; A[0]:=CF; CF:=x +
x:=A[7]; A:=A<<1; A[0]:=x; CF:=x +
x:=HL*[0]; HL*:=HL*>>1; HL*[7]:=CF; CF:=x +
x:=HL*[0]; HL*:=HL*>>1; HL*[7]:=x; CF:=x +
x:=HL*[7]; HL*:=HL*<<1; HL*[0]:=CF; CF:=x +
x:=HL*[7]; HL*:=HL*<<1; HL*[0]:=x; CF:=x +
x:=r[0]; r:=r>>1; r[7]:=CF; CF:=x +
x:=r[0]; r:=r>>1; r[7]:=x; CF:=x +
x:=r[7]; r:=r<<1; r[0]:=CF; CF:=x +
x:=r[7]; r:=r<<1; r[0]:=x; CF:=x +
x=HL*; HL*[0123]:=A[0123]; HL*[7654]:=x[0123]; A[0123]:=x[7654] +
x=HL*; HL*[7654]:=A[0123]; HL*[0123]:=x[7654]; A[0123]:=x[0123] +
{if HL*!=A DE*:=HL*;} DE++; HL++; BC-- +
{if HL*!=A DE*:=HL*;} DE++; HL--; BC-- +