DMA interrupt enable 2

From SpecNext official Wiki
Revision as of 12:33, 3 November 2024 by Sol HSA (talk | contribs) (updated to 78a6ee50)
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search
Number $CE
Readable Yes
Writable Yes
Short Description UART Interrupts that can override DMA
 bit 7 = Reserved must be zero
 bit 6 = UART1 Tx empty
 bit 5 = UART1 Rx half full     \ shared
 bit 4 = UART1 Rx available     / interrupt
 bit 3 = Reserved must be zero
 bit 2 = UART0 Tx empty
 bit 1 = UART0 Rx half full     \ shared
 bit 0 = UART0 Rx available     / interrupt
  • Set bits indicate the corresponding interrupt will interrupt a dma operation when in hw im2 mode

soft reset = 0x00