User contributions for Xalior - SpecNext Wiki

Results for Xalior talk block log uploads logs abuse log

A user with 419 edits. Account created on 14 April 2019.

Jump to: navigation, search

11:2311:23, 14 October 2025 diff hist +37 N Copper Control High Byte Xalior moved page Copper Control High Byte to Copper Control Register: match formal nextreg.txt name current Tag: New redirect
11:2311:23, 14 October 2025 diff hist 0 m Copper Control Register Xalior moved page Copper Control High Byte to Copper Control Register: match formal nextreg.txt name current
11:2311:23, 14 October 2025 diff hist +41 N Copper Control Low Byte Xalior moved page Copper Control Low Byte to Copper Address LSB Register: match formal nextreg.txt name current Tag: New redirect
11:2311:23, 14 October 2025 diff hist 0 m Copper Address LSB Register Xalior moved page Copper Control Low Byte to Copper Address LSB Register: match formal nextreg.txt name current
11:2011:20, 14 October 2025 diff hist +46 N Copper Data Xalior moved page Copper Data to Copper Data 8-bit Write Register: match formal nextreg.txt name current Tag: New redirect
11:2011:20, 14 October 2025 diff hist 0 m Copper Data 8-bit Write Register Xalior moved page Copper Data to Copper Data 8-bit Write Register: match formal nextreg.txt name current
11:1911:19, 14 October 2025 diff hist +33 N Memory management slot 7 bank Xalior moved page Memory management slot 7 bank to MMU slot 7 Register: match formal nextreg.txt name current Tag: New redirect
11:1911:19, 14 October 2025 diff hist 0 m MMU slot 7 Register Xalior moved page Memory management slot 7 bank to MMU slot 7 Register: match formal nextreg.txt name current
11:1711:17, 14 October 2025 diff hist +33 N Memory management slot 6 bank Xalior moved page Memory management slot 6 bank to MMU slot 6 Register: match formal nextreg.txt name current Tag: New redirect
11:1711:17, 14 October 2025 diff hist 0 m MMU slot 6 Register Xalior moved page Memory management slot 6 bank to MMU slot 6 Register: match formal nextreg.txt name current
11:1511:15, 14 October 2025 diff hist +33 N MMU 5 Register Xalior moved page MMU 5 Register to MMU slot 5 Register: match formal nextreg.txt name current Tag: New redirect
11:1511:15, 14 October 2025 diff hist 0 m MMU slot 5 Register Xalior moved page MMU 5 Register to MMU slot 5 Register: match formal nextreg.txt name current
11:1511:15, 14 October 2025 diff hist +28 N Memory management slot 5 bank Xalior moved page Memory management slot 5 bank to MMU 5 Register: match formal nextreg.txt name current Tag: New redirect
11:1511:15, 14 October 2025 diff hist 0 m MMU slot 5 Register Xalior moved page Memory management slot 5 bank to MMU 5 Register: match formal nextreg.txt name
11:1411:14, 14 October 2025 diff hist +33 N Memory management slot 4 bank Xalior moved page Memory management slot 4 bank to MMU slot 4 Register: match formal nextreg.txt name current Tag: New redirect
11:1411:14, 14 October 2025 diff hist 0 m MMU slot 4 Register Xalior moved page Memory management slot 4 bank to MMU slot 4 Register: match formal nextreg.txt name current
11:1411:14, 14 October 2025 diff hist +33 N Memory management slot 3 bank Xalior moved page Memory management slot 3 bank to MMU slot 3 Register: match formal nextreg.txt name current Tag: New redirect
11:1411:14, 14 October 2025 diff hist 0 m MMU slot 3 Register Xalior moved page Memory management slot 3 bank to MMU slot 3 Register: match formal nextreg.txt name current
11:1411:14, 14 October 2025 diff hist +33 N Memory management slot 2 bank Xalior moved page Memory management slot 2 bank to MMU slot 2 Register: match formal nextreg.txt name current Tag: New redirect
11:1411:14, 14 October 2025 diff hist 0 m MMU slot 2 Register Xalior moved page Memory management slot 2 bank to MMU slot 2 Register: match formal nextreg.txt name current
11:1411:14, 14 October 2025 diff hist +33 N Memory management slot 1 bank Xalior moved page Memory management slot 1 bank to MMU slot 1 Register: match formal nextreg.txt name current Tag: New redirect
11:1411:14, 14 October 2025 diff hist 0 m MMU slot 1 Register Xalior moved page Memory management slot 1 bank to MMU slot 1 Register: match formal nextreg.txt name current
11:1311:13, 14 October 2025 diff hist +33 N MMU slot 0 bank Xalior moved page MMU slot 0 bank to MMU slot 0 Register: match formal nextreg.txt name current Tag: New redirect
11:1311:13, 14 October 2025 diff hist 0 m MMU slot 0 Register Xalior moved page MMU slot 0 bank to MMU slot 0 Register: match formal nextreg.txt name current
11:1311:13, 14 October 2025 diff hist +29 N Memory management slot 0 bank Xalior moved page Memory management slot 0 bank to MMU slot 0 bank: match formal nextreg.txt name current Tag: New redirect
11:1311:13, 14 October 2025 diff hist 0 m MMU slot 0 Register Xalior moved page Memory management slot 0 bank to MMU slot 0 bank: match formal nextreg.txt name
11:1211:12, 14 October 2025 diff hist +48 N Sprites Transparency Index Register Xalior moved page Sprites Transparency Index Register to Sprite Transparency Index Register: match formal nextreg.txt name current Tag: New redirect
11:1211:12, 14 October 2025 diff hist 0 m Sprite Transparency Index Register Xalior moved page Sprites Transparency Index Register to Sprite Transparency Index Register: match formal nextreg.txt name current
11:1111:11, 14 October 2025 diff hist +38 N Transparency colour fallback Register Xalior moved page Transparency colour fallback Register to Fallback Colour Register: match formal nextreg.txt name current Tag: New redirect
11:1111:11, 14 October 2025 diff hist 0 m Fallback Colour Register Xalior moved page Transparency colour fallback Register to Fallback Colour Register: match formal nextreg.txt name current
11:0811:08, 14 October 2025 diff hist +51 N Enhanced ULA Palette Extension Xalior moved page Enhanced ULA Palette Extension to Palette Value (9 bit colour) Register: match formal nextreg.txt name (also, old name wildly inaccurate) current Tag: New redirect
11:0811:08, 14 October 2025 diff hist 0 m Palette Value (9 bit colour) Register Xalior moved page Enhanced ULA Palette Extension to Palette Value (9 bit colour) Register: match formal nextreg.txt name (also, old name wildly inaccurate) current
11:0311:03, 14 October 2025 diff hist +42 N Enhanced ULA Control Register Xalior moved page Enhanced ULA Control Register to ULA Palette Control Register: match formal nextreg.txt name current Tag: New redirect
11:0311:03, 14 October 2025 diff hist 0 m ULA Palette Control Register Xalior moved page Enhanced ULA Control Register to ULA Palette Control Register: match formal nextreg.txt name current
11:0011:00, 14 October 2025 diff hist +52 N Enhanced ULA Ink Color Mask Xalior moved page Enhanced ULA Ink Color Mask to ULANext Attribute Byte Format Register: match formal nextreg.txt name current Tag: New redirect
11:0011:00, 14 October 2025 diff hist 0 m ULANext Attribute Byte Format Register Xalior moved page Enhanced ULA Ink Color Mask to ULANext Attribute Byte Format Register: match formal nextreg.txt name current
10:5710:57, 14 October 2025 diff hist +51 N Palette Value Register Xalior moved page Palette Value Register to Palette Value (8 bit colour) Register: match formal nextreg.txt name current Tag: New redirect
10:5710:57, 14 October 2025 diff hist 0 m Palette Value (8 bit colour) Register Xalior moved page Palette Value Register to Palette Value (8 bit colour) Register: match formal nextreg.txt name current
10:5210:52, 14 October 2025 diff hist +41 N Sprite port-mirror Attribute 4 Register Xalior moved page Sprite port-mirror Attribute 4 Register to Sprite Attribute 4 Register: match formal nextreg.txt name current Tag: New redirect
10:5210:52, 14 October 2025 diff hist 0 m Sprite Attribute 4 Register Xalior moved page Sprite port-mirror Attribute 4 Register to Sprite Attribute 4 Register: match formal nextreg.txt name current
10:5210:52, 14 October 2025 diff hist +41 N Sprite port-mirror Attribute 3 Register Xalior moved page Sprite port-mirror Attribute 3 Register to Sprite Attribute 3 Register: match formal nextreg.txt name current Tag: New redirect
10:5210:52, 14 October 2025 diff hist 0 m Sprite Attribute 3 Register Xalior moved page Sprite port-mirror Attribute 3 Register to Sprite Attribute 3 Register: match formal nextreg.txt name current
10:5210:52, 14 October 2025 diff hist +41 N Sprite port-mirror Attribute 2 Register Xalior moved page Sprite port-mirror Attribute 2 Register to Sprite Attribute 2 Register: match formal nextreg.txt name current Tag: New redirect
10:5210:52, 14 October 2025 diff hist 0 m Sprite Attribute 2 Register Xalior moved page Sprite port-mirror Attribute 2 Register to Sprite Attribute 2 Register: match formal nextreg.txt name current
10:5110:51, 14 October 2025 diff hist +41 N Sprite port-mirror Attribute 1 Register Xalior moved page Sprite port-mirror Attribute 1 Register to Sprite Attribute 1 Register: match formal nextreg.txt name current Tag: New redirect
10:5110:51, 14 October 2025 diff hist 0 m Sprite Attribute 1 Register Xalior moved page Sprite port-mirror Attribute 1 Register to Sprite Attribute 1 Register: match formal nextreg.txt name current
10:5110:51, 14 October 2025 diff hist +41 N Sprite port-mirror Attribute 0 Register Xalior moved page Sprite port-mirror Attribute 0 Register to Sprite Attribute 0 Register: match formal nextreg.txt name current Tag: New redirect
10:5110:51, 14 October 2025 diff hist 0 m Sprite Attribute 0 Register Xalior moved page Sprite port-mirror Attribute 0 Register to Sprite Attribute 0 Register: match formal nextreg.txt name current
10:4910:49, 14 October 2025 diff hist +37 N LoRes Y Offset Register Xalior moved page LoRes Y Offset Register to LoRes Y Scroll Register: match formal nextreg.txt name current Tag: New redirect
10:4910:49, 14 October 2025 diff hist 0 m LoRes Y Scroll Register Xalior moved page LoRes Y Offset Register to LoRes Y Scroll Register: match formal nextreg.txt name current

Retrieved from "http://wiki.specnext.dev/Special:Contributions/Xalior"