User contributions for Ped7g
12 November 2019
- 09:2509:25, 12 November 2019 diff hist +1,046 N Expansion Bus Enable Register core 3.0 changes/refresh
- 09:1609:16, 12 November 2019 diff hist +37 N Uncommited User Storage Ped7g moved page Uncommited User Storage to User Storage 0 Register: core 3.0 change/refresh current Tag: New redirect
- 09:1609:16, 12 November 2019 diff hist 0 m User Storage 0 Register Ped7g moved page Uncommited User Storage to User Storage 0 Register: core 3.0 change/refresh current
- 08:2808:28, 12 November 2019 diff hist +31 LoRes Control Register core 3.0 changes/refresh current
- 08:2608:26, 12 November 2019 diff hist +93 Tile Definitions Base Address Register core 3.0 changes/refresh
- 08:2408:24, 12 November 2019 diff hist +94 Tilemap Base Address Register core 3.0 changes/refresh
- 08:1908:19, 12 November 2019 diff hist +132 Default Tilemap Attribute Register core 3.0 changes/refresh
- 08:1608:16, 12 November 2019 diff hist −17 Tilemap Control Register core 3.0 changes/refresh
- 08:0808:08, 12 November 2019 diff hist +366 N LoRes Control Register core 3.0 changes/refresh
- 08:0408:04, 12 November 2019 diff hist +341 N Display Control 1 Register core 3.0 changes/refresh
- 07:5607:56, 12 November 2019 diff hist +123 ULA Control Register core 3.0 changes/refresh
11 November 2019
- 23:0723:07, 11 November 2019 diff hist +762 N Copper Data 16-bit Write Register core 3.0 changes/refresh current
- 22:3822:38, 11 November 2019 diff hist +77 Palette Index Register core 3.0 changes/refresh current
- 20:5320:53, 11 November 2019 diff hist −17 User Storage 0 Register core 3.0 changes/refresh
- 17:1617:16, 11 November 2019 diff hist +209 Keymap High Address Register core 3.0 changes/refresh
- 17:1217:12, 11 November 2019 diff hist +123 ULA Palette Control Register core 3.0 changes/refresh
- 17:1117:11, 11 November 2019 diff hist +122 Palette Index Register core 3.0 changes/refresh
- 17:0617:06, 11 November 2019 diff hist +118 Palette Value (8 bit colour) Register core 3.0 changes/refresh
- 17:0117:01, 11 November 2019 diff hist +305 Keymap High Address Register core 3.0 changes/refresh
- 16:5216:52, 11 November 2019 diff hist −250 Peripheral 3 Setting Register core 3.0 changes/refresh
- 15:2815:28, 11 November 2019 diff hist −387 LoRes Y Scroll Register core 3.0 changes/refresh
- 15:2715:27, 11 November 2019 diff hist −641 LoRes X Scroll Register core 3.0 changes/refresh
- 15:2415:24, 11 November 2019 diff hist +37 N ULA / LoRes Layer Y Offset Register Ped7g moved page ULA / LoRes Layer Y Offset Register to LoRes Y Offset Register: core 3.0 change current Tag: New redirect
- 15:2415:24, 11 November 2019 diff hist 0 m LoRes Y Scroll Register Ped7g moved page ULA / LoRes Layer Y Offset Register to LoRes Y Offset Register: core 3.0 change
- 15:2315:23, 11 November 2019 diff hist +37 N ULA / LoRes Layer X Offset Register Ped7g moved page ULA / LoRes Layer X Offset Register to LoRes X Offset Register: core 3.0 change current Tag: New redirect
- 15:2315:23, 11 November 2019 diff hist 0 m LoRes X Scroll Register Ped7g moved page ULA / LoRes Layer X Offset Register to LoRes X Offset Register: core 3.0 change
- 15:1615:16, 11 November 2019 diff hist +325 N DAC C Mirror (right) Register core 3.0 changes/refresh
- 15:1315:13, 11 November 2019 diff hist +161 DAC A+D Mirror (mono) Register core 3.0 changes/refresh
- 15:0915:09, 11 November 2019 diff hist +44 N SoundDrive port 0xDF mirror Register Ped7g moved page SoundDrive port 0xDF mirror Register to DAC A+D (mono) mirror Register: unifying the DAC mirror registers names after core3.0 current Tag: New redirect
- 15:0915:09, 11 November 2019 diff hist 0 m DAC A+D Mirror (mono) Register Ped7g moved page SoundDrive port 0xDF mirror Register to DAC A+D (mono) mirror Register: unifying the DAC mirror registers names after core3.0
- 15:0415:04, 11 November 2019 diff hist +322 N DAC B Mirror (left) Register core 3.0 changes/refresh
- 14:5614:56, 11 November 2019 diff hist +97 Keymap High Address Register core 3.0 changes/refresh
- 14:4814:48, 11 November 2019 diff hist +123 N ULA Y Offset Register core 3.0 changes/refresh current
- 14:4614:46, 11 November 2019 diff hist +123 N ULA X Offset Register core 3.0 changes/refresh current
- 14:3614:36, 11 November 2019 diff hist +5 m Clip Window Tilemap Register core 3.0 changes/refresh current
- 14:3414:34, 11 November 2019 diff hist +12 Clip Window Tilemap Register core 3.0 changes/refresh
- 14:3214:32, 11 November 2019 diff hist +53 Clip Window ULA/LoRes Register core 3.0 changes/refresh current
- 14:1814:18, 11 November 2019 diff hist +85 Sprite and Layers System Register core 3.0 changes/refresh
- 14:1014:10, 11 November 2019 diff hist +29 Layer 2 Shadow RAM bank Register core 3.0 changes/refresh
- 14:0814:08, 11 November 2019 diff hist +37 Layer 2 Active RAM Bank Register core 3.0 changes/refresh
- 14:0214:02, 11 November 2019 diff hist +144 Video Timing Register core 3.0 changes/refresh
- 13:5813:58, 11 November 2019 diff hist +15 Anti-brick Register core 3.0 changes/refresh
- 13:3413:34, 11 November 2019 diff hist −6 Peripheral 4 Setting Register core 3.0 changes/refresh
- 13:2813:28, 11 November 2019 diff hist −16 Peripheral 3 Setting Register core 3.0 changes/refresh
- 13:1713:17, 11 November 2019 diff hist +179 CPU Speed Register core 3.0 changes/refresh
- 12:5312:53, 11 November 2019 diff hist −98 Peripheral 2 Setting Register core 3.0 changes/refresh
- 12:4512:45, 11 November 2019 diff hist −14 m Peripheral 2 Setting Register core 3.0 changes/refresh
- 12:4212:42, 11 November 2019 diff hist +167 Config Mapping Register core 3.0 changes/refresh
- 12:3912:39, 11 November 2019 diff hist +7 Machine Type Register core 3.0 changes
- 12:3212:32, 11 November 2019 diff hist +158 Reset Register core 3.0 changes