Difference between revisions of "DMA interrupt enable 1"
From SpecNext official Wiki
(updated to 78a6ee50) |
(updated to 78a6ee50) |
||
Line 16: | Line 16: | ||
soft reset = 0x00 | soft reset = 0x00 | ||
+ | |||
+ | Because interrupts are only sampled at the end of an instruction by the Z80, each time the dma is interrupted one instruction of progress is made in the main program. |
Latest revision as of 12:35, 3 November 2024
Number | $CD |
---|---|
Readable | Yes |
Writable | Yes |
Short Description | CTC Interrupts that can override DMA |
bit 7 = ctc channel 7 zc/to bit 6 = ctc channel 6 zc/to bit 5 = ctc channel 5 zc/to bit 4 = ctc channel 4 zc/to bit 3 = ctc channel 3 zc/to bit 2 = ctc channel 2 zc/to bit 1 = ctc channel 1 zc/to bit 0 = ctc channel 0 zc/to
- Set bits indicate the corresponding interrupt will interrupt a dma operation when in hw im2 mode
soft reset = 0x00
Because interrupts are only sampled at the end of an instruction by the Z80, each time the dma is interrupted one instruction of progress is made in the main program.