Difference between revisions of "Pi Peripheral Enable Register"
From SpecNext official Wiki
(core 3.0 changes/refresh) |
(updated to 78a6ee50) |
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| 7-6 || Reserved, must be 0 | | 7-6 || Reserved, must be 0 | ||
|- | |- | ||
| − | | 5 || Enable UART on GPIO 14,15 (overrides GPIO) (soft reset = 0) | + | | 5 || Enable UART on GPIO 14,15 (overrides GPIO) (soft reset = 0) * |
|- | |- | ||
| 4 || 0 to connect Rx to GPIO 15, Tx to GPIO 14 (for comm with Pi hats) (soft reset = 0) | | 4 || 0 to connect Rx to GPIO 15, Tx to GPIO 14 (for comm with Pi hats) (soft reset = 0) | ||
| Line 21: | Line 21: | ||
| 0 || Enable SPI on GPIO 7,8,9,10,11 (overrides GPIO) (soft reset = 0) | | 0 || Enable SPI on GPIO 7,8,9,10,11 (overrides GPIO) (soft reset = 0) | ||
|} | |} | ||
| + | |||
| + | * GPIO 16,17 will function as rtr_n and cts_n if the uart is in hw flow control mode | ||
| + | |||
(note: Next registers with number higher than $7F are inaccessible from Copper code) | (note: Next registers with number higher than $7F are inaccessible from Copper code) | ||
Latest revision as of 11:54, 3 November 2024
| Number | $A0 |
|---|---|
| Readable | Yes |
| Writable | Yes |
| Short Description | Enable Pi peripherals: UART, Pi hats, I2C, SPI |
| Bit | Description |
|---|---|
| 7-6 | Reserved, must be 0 |
| 5 | Enable UART on GPIO 14,15 (overrides GPIO) (soft reset = 0) * |
| 4 | 0 to connect Rx to GPIO 15, Tx to GPIO 14 (for comm with Pi hats) (soft reset = 0)
1 to connect Rx to GPIO 14, Tx to GPIO 15 (for comm with Pi) |
| 3 | Enable I2C on GPIO 2,3 (overrides GPIO) (soft reset = 0) |
| 2-1 | Reserved, must be 0 |
| 0 | Enable SPI on GPIO 7,8,9,10,11 (overrides GPIO) (soft reset = 0) |
* GPIO 16,17 will function as rtr_n and cts_n if the uart is in hw flow control mode
(note: Next registers with number higher than $7F are inaccessible from Copper code)