Difference between revisions of "Video Timing Register"
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! Bit pattern !! selected variant | ! Bit pattern !! selected variant | ||
|- | |- | ||
− | | %000 || Base VGA timing, clk28 = 28000000 | + | | %000 || Base VGA timing, clk28 = 28000000 (HDMI compatible) |
|- | |- | ||
− | | %001 || VGA setting 1, clk28 = 28571429 | + | | %001 || VGA setting 1, clk28 = 28571429 (HDMI compatible) |
|- | |- | ||
| %010 || VGA setting 2, clk28 = 29464286 | | %010 || VGA setting 2, clk28 = 29464286 | ||
Line 31: | Line 31: | ||
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| %110 || VGA setting 6, clk28 = 33000000 | | %110 || VGA setting 6, clk28 = 33000000 | ||
− | |||
− | |||
|} | |} | ||
Each VGA setting increases the frequency by approximately 1 kHz. | Each VGA setting increases the frequency by approximately 1 kHz. | ||
− | Experimental results based on | + | Experimental results based on "Vibrant VL5A9DL" vga monitor reports: |
{| class="wikitable" | {| class="wikitable" |
Latest revision as of 11:22, 3 November 2024
Number | $11 |
---|---|
Readable | Yes |
Writable | Yes |
Short Description | Sets video output timing variant. |
(writable in config mode only)
Bit | Function |
---|---|
7-3 | Reserved, must be 0 |
2-0 | video signal timing variant |
Possible timing variants:
Bit pattern | selected variant |
---|---|
%000 | Base VGA timing, clk28 = 28000000 (HDMI compatible) |
%001 | VGA setting 1, clk28 = 28571429 (HDMI compatible) |
%010 | VGA setting 2, clk28 = 29464286 |
%011 | VGA setting 3, clk28 = 30000000 |
%100 | VGA setting 4, clk28 = 31000000 |
%101 | VGA setting 5, clk28 = 32000000 |
%110 | VGA setting 6, clk28 = 33000000 |
Each VGA setting increases the frequency by approximately 1 kHz.
Experimental results based on "Vibrant VL5A9DL" vga monitor reports:
mode | 50hz | 60hz |
---|---|---|
vga0 | 49.3 | 58.1 |
vga1 | 50.3 | 59.3 |
vga2 | 51.9 | 61.1 |
vga3 | 52.8 | 62.2 |
vga4 | 54.6 | 64.3 |
vga5 | 56.4 | 66.4 |
vga6 | 58.1 | 68.5 |
50/60Hz depending on bit 2 of Peripheral 1 Register ($05).