Difference between revisions of "Anti-brick Register"
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|ShortDesc=Used within the [[Anti-brick system]]. | |ShortDesc=Used within the [[Anti-brick system]]. | ||
}} | }} | ||
| + | '''Read''' bit mapped: | ||
| + | {| class="wikitable" | ||
| + | ! Bit !! Effect | ||
| + | |- | ||
| + | | 7 || Reserved | ||
| + | |- | ||
| + | | 6-2 || Core ID | ||
| + | |- | ||
| + | | 1 || Button DRIVE (DivMMC) is pressed | ||
| + | |- | ||
| + | | 0 || Button M1 (Multiface) is pressed | ||
| + | |} | ||
| − | + | '''Write''' bit mapped: | |
{| class="wikitable" | {| class="wikitable" | ||
! Bit !! Effect | ! Bit !! Effect | ||
|- | |- | ||
| − | | 7 || | + | | 7 || Start selected core (reboot FPGA) |
| − | |||
| − | |||
|- | |- | ||
| − | | | + | | 6-5 || Reserved, must be 0 |
|- | |- | ||
| − | | 0 || | + | | 4-0 || Core ID 0-31 (default is 2) (only in config mode) * |
|} | |} | ||
| + | * A write of an out of range core id is ignored; this is the preferred way to determine max id | ||
Note that in normal running pressing the DivMMC or Multiface button creates an NMI which halts any running program, and the reflashable core must be loaded before any user code is run. This means that unless you are rewriting the entire firmware from scratch this register is probably not useful. | Note that in normal running pressing the DivMMC or Multiface button creates an NMI which halts any running program, and the reflashable core must be loaded before any user code is run. This means that unless you are rewriting the entire firmware from scratch this register is probably not useful. | ||
Latest revision as of 11:19, 3 November 2024
| Number | $10 |
|---|---|
| Readable | Yes |
| Writable | Yes |
| Short Description | Used within the Anti-brick system. |
Read bit mapped:
| Bit | Effect |
|---|---|
| 7 | Reserved |
| 6-2 | Core ID |
| 1 | Button DRIVE (DivMMC) is pressed |
| 0 | Button M1 (Multiface) is pressed |
Write bit mapped:
| Bit | Effect |
|---|---|
| 7 | Start selected core (reboot FPGA) |
| 6-5 | Reserved, must be 0 |
| 4-0 | Core ID 0-31 (default is 2) (only in config mode) * |
* A write of an out of range core id is ignored; this is the preferred way to determine max id
Note that in normal running pressing the DivMMC or Multiface button creates an NMI which halts any running program, and the reflashable core must be loaded before any user code is run. This means that unless you are rewriting the entire firmware from scratch this register is probably not useful.