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Condition

Printout selection

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Parameters [+]

limit:

The maximum number of results to return

offset:

The offset of the first result

link:

Show values as links

headers:

Display the headers/property names

mainlabel:

The label to give to the main page name

intro:

The text to display before the query results, if there are any

outro:

The text to display after the query results, if there are any

searchlabel:

Text for continuing the search

default:

The text to display if there are no query results

class:

An additional CSS class to set for the table

transpose:

Display table headers vertically and results horizontally

sep:

The separator between results

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ResultCodeDebugExtra

To embed this query inline into a wiki page use the code below.

{{#ask: [[IsZ80Instruction::true]]
 |?Cleandesc=Mnemonic (use uppercase)
 |?Status
 |?Admode1=Addressing Mode 1
 |?Admode2=Addressing Mode 2
 |?Ceffect=C
 |?Neffect=N
 |?Pveffect=PV
 |?Heffect=H
 |?Zeffect=Z
 |?Seffect=S
 |?Tstates=T-States
 |?Shortfx=Summary
 |format=table
 |limit=20
 |offset=0
 |sort=
 |order=asc
 |mainlabel=-
}}

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The query [[IsZ80Instruction::true]] was answered by the "SMWSQLStore" in 0.0054 seconds.

Mnemonic (use uppercase)	Status	Addressing Mode 1	Addressing Mode 2	C	N	PV	H	Z	S	T-States	Summary
ADC A, (HL)	S	Accumulator	Indirect	S	0	V	S	S	S	7	A+=HL*+(CF?1:0)
ADC A, (IXY+d)	S	Accumulator	Indexed	S	0	V	S	S	S	19	A+=(IXY+d)*+(CF?1:0)
ADC A, n	S	Accumulator	Immediate	S	0	V	S	S	S	7	A+=n+(CF?1:0)
ADC A, r	S	Accumulator	Register	S	0	V	S	S	S	4	A+=r+(CF?1:0)
ADC HL, BC/DE/HL/SP	S	Register	Register	S	0	V	!	S	S	15	HL+=rr+(CF?1:0)
ADD A, (HL)	S	Accumulator	Indirect	S	0	V	S	S	S	7	A+=HL*
ADD A, (IXY+d)	S	Accumulator	Indexed	S	0	V	S	S	S	19	A+=(IXY+d)*
ADD A, n	S	Accumulator	Immediate	S	0	V	S	S	S	7	A+=n
ADD A, r	S	Accumulator	Register	S	0	V	S	S	S	4	A+=r
ADD HL, BC/DE/HL/SP	S	Register	Register	S	0	-	!	-	-	11	HL+=rr
ADD HL/DE/BC, A	E	Register	Register	?	-	-	-	-	-	8	rr+=unsigned A
ADD HL/DE/BC, nn	E	Register	Immediate	-	-	-	-	-	-	16	rr+=nn
ADD IXY, BC/DE/IXY/SP	S	Register	Register	S	0	-	!	-	-	15	IXY+=rr
AND (HL)	S	Indirect	-	0	0	P	1	S	S	7	A := A & HL*
AND (IXY+d)	S	Indexed	-	0	0	P	1	S	S	19	A := A & (IXY+d)*
AND n	S	Immediate	-	0	0	P	1	S	S	7	A := A & n
AND r	S	Register	-	0	0	P	1	S	S	4	A := A & r
BIT b,(HL)	S	Immediate	Indirect	-	0	?	1	!	?	12	HL*[b]==1?
BIT b,(IXY+d)	S	Immediate	Indexed	-	0	?	1	!	?	20	(IXY+d)*[b]==1?
BIT b,r	S	Immediate	Register	-	0	?	1	!	?	8	r[b]==1?