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 NumberReadableWritableDescription
Tilemap Offset X MSB Register$2FYesYesSets the pixel offset (two high bits) used for drawing Tilemap graphics on the screen.
Tilemap Offset X LSB Register$30YesYesSets the pixel offset (eight low bits) used for drawing Tilemap graphics on the screen.
Tilemap Offset Y Register$31YesYesSets the pixel offset used for drawing Tilemap graphics on the screen.
LoRes X Offset Register$32YesYesPixel X offset (0..255) to use when drawing LoRes Layer.
LoRes Y Offset Register$33YesYesPixel Y offset (0..191) to use when drawing LoRes Layer.
Sprite port-mirror Index Register$34YesYesSelects sprite index 0..127 to be affected by writes to other Sprite ports (and mirrors).
Sprite port-mirror Attribute 0 Register$35NoYesNextreg port-mirror to write directly into "byte 1" of Sprite Attribute Upload ($xx57 / 87).
Sprite port-mirror Attribute 1 Register$36NoYesNextreg port-mirror to write directly into "byte 2" of Sprite Attribute Upload ($xx57 / 87).
Sprite port-mirror Attribute 2 Register$37NoYesNextreg port-mirror to write directly into "byte 3" of Sprite Attribute Upload ($xx57 / 87).
Sprite port-mirror Attribute 3 Register$38NoYesNextreg port-mirror to write directly into "byte 4" of Sprite Attribute Upload ($xx57 / 87).
Sprite port-mirror Attribute 4 Register$39NoYesNextreg port-mirror to write directly into "byte 5" of Sprite Attribute Upload ($xx57 / 87).
Palette Index Register$40YesYesChooses an palette element (index) to manipulate with
Palette Value Register$41YesYesUse to set/read 8-bit colours of the ULANext palette.
Enhanced ULA Ink Color Mask$42YesYesSpecifies mask to extract ink colour from attribute cell value in ULANext mode.
Enhanced ULA Control Register$43YesYesEnables or disables Enhanced ULA interpretation of attribute values and toggles active palette.
Enhanced ULA Palette Extension$44YesYesUse to set 9-bit (2-byte) colours of the Enhanced ULA palette, or to read second byte of colour.
Transparency colour fallback Register$4AYesYes8-bit colour to be used when all layers contain transparent pixel.
Sprites Transparency Index Register$4BYesYesIndex into sprite palette (of "transparent" colour).
Tilemap Transparency Index Register$4CYesYesIndex into Tilemap palette (of "transparent" colour).
Memory management slot 0 bank$50YesYesSelects the 8k-bank stored in 8k-slot 0 (see Memory map).
Memory management slot 1 bank$51YesYesSelects the 8k-bank stored in 8k-slot 1 (see Memory map).
Memory management slot 2 bank$52YesYesSelects the 8k-bank stored in 8k-slot 2 (see Memory map).
Memory management slot 3 bank$53YesYesSelects the 8k-bank stored in 8k-slot 3 (see Memory map).
Memory management slot 4 bank$54YesYesSelects the 8k-bank stored in 8k-slot 4 (see Memory map).
Memory management slot 5 bank$55YesYesSelects the 8k-bank stored in 8k-slot 5 (see Memory map).
Memory management slot 6 bank$56YesYesSelects the 8k-bank stored in 8k-slot 6 (see Memory map).
Memory management slot 7 bank$57YesYesSelects the 8k-bank stored in 8k-slot 7 (see Memory map).
Copper Data$60NoYesUsed to upload code to the Copper.
Copper Control Low Byte$61YesYesHolds low byte of Copper control bits.
Copper Control High Byte$62YesYesHolds high byte of Copper control flags.
Copper Data 16-bit Write Register$63NoYesUsed to upload code to the Copper.
Vertical Video Line Offset Register$64YesYesOffset numbering of raster lines in copper/interrupt/active register
ULA Control Register$68YesYesDisable ULA, controls ULA mixing/blending, enable ULA+
Display Control 1 Register$69YesYesLayer2, ULA shadow, Timex $FF port
LoRes Control Register$6AYesYesLoRes Radastan mode
Tilemap Control Register$6BYesYesControls Tilemap mode.
Default Tilemap Attribute Register$6CYesYesDefault tile attribute for 8-bit only maps.
Tilemap Base Address Register$6EYesYesBase address of the 40x32 or 80x32 tile map (similar to text-mode of other computers).
Tile Definitions Base Address Register$6FYesYesBase address of the tiles' graphics.
Layer 2 Control Register$70YesYesLayer 2 resolution, palette offset
Layer 2 X Offset MSB Register$71YesYesSets the pixel offset used for drawing Layer 2 graphics on the screen.
Sprite port-mirror Attribute 0 (with INC) Register$75NoYesSame as Sprite port-mirror Attribute 0 Register ($35) (write first byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34)
Sprite port-mirror Attribute 1 (with INC) Register$76NoYesSame as Sprite port-mirror Attribute 1 Register ($36) (write second byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34)
Sprite port-mirror Attribute 2 (with INC) Register$77NoYesSame as Sprite port-mirror Attribute 2 Register ($37) (write third byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34)
Sprite port-mirror Attribute 3 (with INC) Register$78NoYesSame as Sprite port-mirror Attribute 3 Register ($38) (write fourth byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34)
Sprite port-mirror Attribute 4 (with INC) Register$79NoYesThe same as Sprite port-mirror Attribute 4 Register ($39) (write fifth byte of sprite-attributes), plus increments Sprite port-mirror Index Register ($34)
User Storage 0 Register$7FYesYes8-bit storage for user
Expansion Bus Enable Register$80YesYesExpansion bus enable/config
Expansion Bus Control Register$81YesYesExpansion bus controls
Internal Port Decoding b0-7 Register$82YesYesEnabling internal ports decoding
Internal Port Decoding b8-15 Register$83YesYesEnabling internal ports decoding
Internal Port Decoding b16-23 Register$84YesYesEnabling internal ports decoding
Internal Port Decoding b24-31 Register$85YesYesEnabling internal ports decoding
Expansion Bus Decoding b0-7 Register$86YesYesWhen expansion bus is enabled: Internal ports decoding mask
Expansion Bus Decoding b8-15 Register$87YesYesWhen expansion bus is enabled: Internal ports decoding mask
Expansion Bus Decoding b16-23 Register$88YesYesWhen expansion bus is enabled: Internal ports decoding mask
Expansion Bus Decoding b24-31 Register$89YesYesWhen expansion bus is enabled: Internal ports decoding mask
Expansion Bus I/O Propagate Register$8AYesYesMonitoring internal I/O or adding external keyboard
Alternate ROM$8CYesYesEnable alternate ROM or lock 48k ROM
Memory Mapping Register$8EYesYesControl classic Spectrum memory mapping
Pi GPIO Output Enable Register$90-$93YesYesEnables GPIO pins output
Pi GPIO Register$98-$9BYesYesGPIO pins mapped to Next Register
Pi Peripheral Enable Register$A0YesYesEnable Pi peripherals: UART, Pi hats, I2C, SPI
Pi I2S Audio Control Register$A2YesYesPi I2S controls
Pi I2S Clock Divide Register$A3YesYesPi I2S clock divide in master mode.
ESP WiFi GPIO Output Register$A8YesYesESP WiFi GPIO Output
ESP WiFi GPIO Register$A9YesYesESP WiFi GPIO Read/Write
Extended Keys 0 Register$B0YesNoRead Next keyboard compound keys separately
Extended Keys 1 Register$B1YesNoRead Next keyboard compound keys separately
DivMMC Trap Enable 1 Register$B2YesYesDivMMC trap configuration
DivMMC Trap Enable 2 Register$B4YesYesDivMMC trap configuration
Debug LED Control Register$FFNoYesTurns debug LEDs on and off on TBBlue implementations that have them.