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Mnemonic (use uppercase)	Status	Addressing Mode 1	Addressing Mode 2	C	N	PV	H	Z	S	T-States	Summary
ADC A, (HL)	S	Accumulator	Indirect	S	0	V	S	S	S	7	A+=HL*+(CF?1:0)
ADC A, (IXY+d)	S	Accumulator	Indexed	S	0	V	S	S	S	19	A+=(IXY+d)*+(CF?1:0)
ADC A, n	S	Accumulator	Immediate	S	0	V	S	S	S	7	A+=n+(CF?1:0)
ADC A, r	S	Accumulator	Register	S	0	V	S	S	S	4	A+=r+(CF?1:0)
ADC HL, BC/DE/HL/SP	S	Register	Register	S	0	V	!	S	S	15	HL+=rr+(CF?1:0)
ADD A, (HL)	S	Accumulator	Indirect	S	0	V	S	S	S	7	A+=HL*
ADD A, (IXY+d)	S	Accumulator	Indexed	S	0	V	S	S	S	19	A+=(IXY+d)*
ADD A, n	S	Accumulator	Immediate	S	0	V	S	S	S	7	A+=n
ADD A, r	S	Accumulator	Register	S	0	V	S	S	S	4	A+=r
ADD HL, BC/DE/HL/SP	S	Register	Register	S	0	-	!	-	-	11	HL+=rr
ADD HL/DE/BC, A	E	Register	Register	?	-	-	-	-	-	8	rr+=unsigned A
ADD HL/DE/BC, nn	E	Register	Immediate	-	-	-	-	-	-	16	rr+=nn
ADD IXY, BC/DE/IXY/SP	S	Register	Register	S	0	-	!	-	-	15	IXY+=rr
AND (HL)	S	Indirect	-	0	0	P	1	S	S	7	A := A & HL*
AND (IXY+d)	S	Indexed	-	0	0	P	1	S	S	19	A := A & (IXY+d)*
AND n	S	Immediate	-	0	0	P	1	S	S	7	A := A & n
AND r	S	Register	-	0	0	P	1	S	S	4	A := A & r
BIT b,(HL)	S	Immediate	Indirect	-	0	?	1	!	?	12	HL*[b]==1?
BIT b,(IXY+d)	S	Immediate	Indexed	-	0	?	1	!	?	20	(IXY+d)*[b]==1?
BIT b,r	S	Immediate	Register	-	0	?	1	!	?	8	r[b]==1?
BRLC DE,B	E	-	-	-	-	-	-	-	-	8	DE:=DE<<(B&15) OR DE>>(16-B&15)
BSLA DE,B	E	-	-	-	-	-	-	-	-	8	DE:=DE<<(B&31)
BSRA DE,B	E	-	-	-	-	-	-	-	-	8	DE:=signed(DE)>>(B&31)
BSRF DE,B	E	-	-	-	-	-	-	-	-	8	DE:=~(unsigned(~DE)>>(B&31))
BSRL DE,B	E	-	-	-	-	-	-	-	-	8	DE:=unsigned(DE)>>(B&31)
CALL Z/NZ/C/NC/PO/PE/P/M, nn	S	Address	-	-	-	-	-	-	-	17 ; 10 if not cc	if cc {SP-=2; SP*:=PC; PC:=nn}
CALL nn	S	Address	-	-	-	-	-	-	-	17	SP-=2; SP*:=PC; PC:=nn
CCF	S	-	-	!	0	-	!	-	-	4	CF:=!CF
CP (HL)	S	Indirect	-	S	1	V	S	S	S	7	A-=HL*?
CP (IXY+d)	S	Indexed	-	S	1	V	S	S	S	19	A-=(IXY+d)?
CP n	S	Immediate	-	S	1	V	S	S	S	7	A-=n?
CP r	S	Register	-	S	1	V	S	S	S	4	A-=r?
CPD	S	-	-	-	1	L	S	!	S	16	HL*==A?; HL--; BC--
CPDR	S	-	-	-	1	L	S	!	S	21x+16	do CPD while (!Z && BC>0)
CPI	S	-	-	-	1	L	S	!	S	16	HL*==A?; HL++; BC--
CPIR	S	-	-	-	1	L	S	!	S	21x+16	do CPI while (!Z && BC>0)
CPL	S	-	-	-	1	-	1	-	-	4	A:=~A
DAA	S	-	-	!	-	P	!	S	S	8	if(A&$0F>$09 or HF) A±=$06; if(A&$F0>$90 or CF) A±=$60 (± depends on NF)
DEC (HL)	S	Indirect	-	-	1	!	S	S	S	11	HL*--
DEC (IXY+d)	S	Indexed	-	-	1	!	S	S	S	23	(IXY+D)*--
DEC BC/DE/HL/SP	S	Register	-	-	-	-	-	-	-	6	rr--
DEC IXY	S	Register	-	-	-	-	-	-	-	10	rr--
DEC r	S	Register	-	-	1	!	S	S	S	4	r--
DI	S	-	-	-	-	-	-	-	-	4	IFF1:=0; IFF2:=0
DJNZ n	S	Immediate	-	-	-	-	-	-	-	13	B--; if B!=0 PC+=nn
EI	S	-	-	-	-	-	-	-	-	4	IFF1:=1; IFF2:=1
EX (SP), HL	S	Indirect	Register	-	-	-	-	-	-	19	swap(SP*,HL)
EX (SP), IXY	S	Indirect	Register	-	-	-	-	-	-	23	swap(SP*,IXY)
EX AF, AF'	S	Register	Register	!	!	!	!	!	!	4	swap(AF,AF')
EX DE, HL	S	Register	Register	-	-	-	-	-	-	4	swap(DE,HL)
EXX	S	-	-	-	-	-	-	-	-	4	swap(BC,BC');swap(DE,DE');swap(HL,HL')
HALT	S	-	-	-	-	-	-	-	-	4	waits for interrupt
IM n	S	Immediate	-	-	-	-	-	-	-	8	Interrupt mode:=n
IN (c)	U	Register	-	-	0	P	0	S	S	12	in(BC)?
IN A, (n)	S	Accumulator	Immediate	-	-	-	-	-	-	11	A := in(An)
IN r, (c)	S	Register	Register	-	0	P	0	S	S	12	r := in(BC)
INC (HL)	S	Indirect	-	-	0	!	S	S	S	11	HL*++
INC (IXY+d)	S	Indexed	-	-	0	!	S	S	S	23	(IXY+d)*++
INC BC/DE/HL/SP	S	Register	-	-	-	-	-	-	-	6	rr++
INC IXY	S	Register	-	-	-	-	-	-	-	10	rr++
INC r	S	Register	-	-	0	!	S	S	S	4	r++
IND	S	-	-	?	1	?	?	!	?	16	HL*:=in(BC); HL--; B--
INDR	S	-	-	?	1	?	?	1	?	21x+16	do IND while(B>0)
INI	S	-	-	?	1	?	?	!	?	16	HL*:=in(BC); HL++; B--
INIR	S	-	-	?	1	?	?	1	?	21x+16	do INI while(B>0)
JP (C)	E	Register	-	?	?	?	?	?	?	13	PC:=PC&$C000+IN(C)<<6
JP (HL)	S	Register	-	-	-	-	-	-	-	4	PC:=HL (not PC:=HL*)
JP (IXY)	S	Register	-	-	-	-	-	-	-	8	PC:=IXY (not PC:=IXY*)
JP Z/NZ/NC/C/PO/PE/P/M, nn	S	Address	-	-	-	-	-	-	-	10	if cc PC:=nn
JP nn	S	Address	-	-	-	-	-	-	-	10	PC:=nn
JR C/NC/Z/NZ, nn	S	Immediate	-	-	-	-	-	-	-	12 ; 7 if not cc	if cc PC+=nn
JR nn	S	Immediate	-	-	-	-	-	-	-	12	PC+=nn
LD (BC/DE), A	S	Indirect	Accumulator	-	-	-	-	-	-	7	rr* := A
LD (HL), n	S	Indirect	Immediate	-	-	-	-	-	-	10	HL* := n
LD (HL),r	S	Indirect	Register	-	-	-	-	-	-	7	HL* := r
LD (IXY+d), n	S	Indexed	Immediate	-	-	-	-	-	-	19	(IXY+d)* := n
LD (IXY+d),r	S	Indexed	Register	-	-	-	-	-	-	19	(IXY+D)* := r
LD (nn), A	S	Address	Accumulator	-	-	-	-	-	-	13	(nn)* := A
LD (nn), BC/DE/SP/IXY	S	Address	Register	-	-	-	-	-	-	20	(nn)* := rr
LD (nn), HL	S	Address	Register	-	-	-	-	-	-	16	(nn)* := HL
LD A, (BC/DE)	S	Accumulator	Indirect	-	-	-	-	-	-	7	A := rr*
LD A, (nn)	S	Accumulator	Address	-	-	-	-	-	-	13	A := (nn)*
LD A, I	S	Accumulator	Register	-	0	!	0	S	S	9	A := I; P/V:=IFF2
LD A, R	S	Accumulator	Register	-	0	!	0	S	S	9	A := R; P/V:=IFF2
LD BC/DE/HL/SP, nn	S	Register	Immediate	-	-	-	-	-	-	10	rr := nn
LD BC/DE/SP/IXY, (nn)	S	Register	Address	-	-	-	-	-	-	20	rr := (nn)*
LD HL, (nn)	S	Register	Address	-	-	-	-	-	-	16	HL := (nn)*
LD I, A	S	Register	Accumulator	-	-	-	-	-	-	9	I := A
LD IXY, nn	S	Register	Immediate	-	-	-	-	-	-	14	rr := nn
LD R, A	S	Register	Accumulator	-	-	-	-	-	-	9	R := A
LD SP, HL	S	Register	Register	-	-	-	-	-	-	6	SP := HL
LD SP, IXY	S	Register	Register	-	-	-	-	-	-	10	SP := IXY
LD r, (HL)	S	Register	Indirect	-	-	-	-	-	-	7	r := HL*
LD r, (IXY+d)	S	Register	Indexed	-	-	-	-	-	-	19	r := (IXY+d)*
LD r, r'	S	Register	Register	-	-	-	-	-	-	4	r := r'
LD r,n	S	Register	Immediate	-	-	-	-	-	-	7	r := n
LDD	S	-	-	-	0	L	0	-	-	16	DE:=HL; DE--; HL--; BC--
LDDR	S	-	-	-	0	0	0	-	-	21x+16	do LDD while(BC>0)
LDDRX	E	-	-	-	-	-	-	-	-	21/16	do LDDX while(BC>0)
LDDX	E	-	-	-	-	-	-	-	-	16	{if HL!=A DE:=HL*;} DE++; HL--; BC--