Difference between revisions of "Video Line Interrupt Control Register"
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(Added bit definitions) |
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| Line 8: | Line 8: | ||
! Bit !! Function | ! Bit !! Function | ||
|- | |- | ||
| − | | 7 || (R) INT | + | | 7 || (R) INT signal (even when Z80N has interrupts disabled) (1 = interrupt is requested) |
| + | (W) Reserved, must be 0 | ||
|- | |- | ||
| 6-3 || Reserved, must be 0 | | 6-3 || Reserved, must be 0 | ||
Revision as of 21:09, 22 December 2018
| Number | $22 |
|---|---|
| Readable | Yes |
| Writable | Yes |
| Short Description | Controls the timing of raster interrupts and the ULA frame interrupt. |
| Bit | Function |
|---|---|
| 7 | (R) INT signal (even when Z80N has interrupts disabled) (1 = interrupt is requested)
(W) Reserved, must be 0 |
| 6-3 | Reserved, must be 0 |
| 2 | If 1 disables original ULA interrupt (Reset to 0 after a reset) |
| 1 | If 1 enables Line Interrupt (Reset to 0 after a reset) |
| 0 | MSB of Line Interrupt line value (Reset to 0 after a reset) |