Difference between revisions of "Video Line Interrupt Control Register"

From SpecNext official Wiki
Jump to: navigation, search
(Created page with "{{NextRegister |Number=34 |Readable=Yes |Writable=Yes }}")
 
(7 intermediate revisions by 4 users not shown)
Line 1: Line 1:
 
{{NextRegister
 
{{NextRegister
|Number=34
+
|Number=$22
 
|Readable=Yes
 
|Readable=Yes
 
|Writable=Yes
 
|Writable=Yes
 +
|ShortDesc=Controls the timing of raster interrupts and the ULA frame interrupt.
 
}}
 
}}
 +
{| class="wikitable"
 +
! Bit !! Function
 +
|-
 +
| 7 || (R) INT signal (even when Z80N has interrupts disabled) (1 = interrupt is requested)
 +
(W) Reserved, must be 0
 +
|-
 +
| 6-3 || Reserved, must be 0
 +
|-
 +
| 2 || If 1 disables original ULA interrupt (Reset to 0 after a reset)
 +
|-
 +
| 1 || If 1 enables Line Interrupt (Reset to 0 after a reset)
 +
|-
 +
| 0 || MSB of Line Interrupt line value (Reset to 0 after a reset)
 +
|}
 +
 +
The line interrupt value uses coordinate system of [https://gitlab.com/thesmog358/tbblue/blob/master/docs/extra-hw/copper/COPPER-v0.1c.TXT Copper coprocessor], i.e. line 0 is the first line of pixels. But the line-interrupt happens already when the previous line's pixel area is finished (i.e. the raster-line counter still reads "previous line" and not the one programmed for interrupt). The INT signal is raised while display beam horizontal position is between 256-319 standard pixels, precise timing of interrupt handler execution then depends on how-quickly/if the Z80 will process the INT signal.
 +
 +
The LSB part of desired interrupt line is in {{NextRegNo|$23}}.

Revision as of 21:51, 31 May 2019

Number $22
Readable Yes
Writable Yes
Short Description Controls the timing of raster interrupts and the ULA frame interrupt.
Bit Function
7 (R) INT signal (even when Z80N has interrupts disabled) (1 = interrupt is requested)

(W) Reserved, must be 0

6-3 Reserved, must be 0
2 If 1 disables original ULA interrupt (Reset to 0 after a reset)
1 If 1 enables Line Interrupt (Reset to 0 after a reset)
0 MSB of Line Interrupt line value (Reset to 0 after a reset)

The line interrupt value uses coordinate system of Copper coprocessor, i.e. line 0 is the first line of pixels. But the line-interrupt happens already when the previous line's pixel area is finished (i.e. the raster-line counter still reads "previous line" and not the one programmed for interrupt). The INT signal is raised while display beam horizontal position is between 256-319 standard pixels, precise timing of interrupt handler execution then depends on how-quickly/if the Z80 will process the INT signal.

The LSB part of desired interrupt line is in Video Line Interrupt Value Register ($23).