Difference between revisions of "Pi GPIO Output Enable Register"
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Bits 31-28 are not explicitly specified in the docs, so consider them "Reserved, preserve current value". | Bits 31-28 are not explicitly specified in the docs, so consider them "Reserved, preserve current value". | ||
| + | |||
| + | (note: Next registers with number higher than $7F are inaccessible from Copper code) | ||
Latest revision as of 11:50, 12 November 2019
| Number | $90-$93 |
|---|---|
| Readable | Yes |
| Writable | Yes |
| Short Description | Enables GPIO pins output |
Bits 27-0: Set bits enable GPIO output on the corresponding GPIO pin (soft reset = all 0)
GPIO pins 1:0 cannot be enabled.
The register $93 is MSB (most significant byte = bits 31-24), register $90 is LSB (least significant byte = bits 7-0).
Bits 31-28 are not explicitly specified in the docs, so consider them "Reserved, preserve current value".
(note: Next registers with number higher than $7F are inaccessible from Copper code)