Difference between revisions of "Machine Type Register"

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m
(core 3.1.5 changes/refresh)
 
Line 17: Line 17:
 
| 7 || (R) Next write to {{NextRegNo|$44}} will affect colour byte: 0 = RRRGGGBB, 1 = p000000B
 
| 7 || (R) Next write to {{NextRegNo|$44}} will affect colour byte: 0 = RRRGGGBB, 1 = p000000B
 
|-
 
|-
| 6-4 || Display timing. %000: internal usage %001: ZX 48k; %010: ZX 128k/+2 (Grey); %011: ZX +2A-B/+3e/Next Native; %100: Pentagon.
+
| 6-4 || Display timing (affects I/O port decoding (since core 3.1.1)):
 +
: %000: internal usage
 +
: %001: ZX 48k
 +
: %010: ZX 128k/+2 (Grey)
 +
: %011: ZX +2A-B/+3e/Next Native
 +
: %100: Pentagon.
 
|-
 
|-
 
| 3 || 1 to toggle user lock on display timing (hard reset = 0) (since core 3.1.0)
 
| 3 || 1 to toggle user lock on display timing (hard reset = 0) (since core 3.1.0)
 
|-
 
|-
| 2-0 || Machine type:
+
| 2-0 || Machine type (determines roms loaded and multiface type (since core 3.1.1)):
%000: Config mode; %001: ZX 48k; %010: ZX 128k/+2 (Grey); %011: ZX +2A-B/+3e/Next Native; %100: Pentagon.
+
: %000: Config mode
Writeable only in config mode, may affect port decoding and enabling of some hardware.
+
: %001: ZX 48k
 +
: %010: ZX 128k/+2 (Grey)
 +
: %011: ZX +2A-B/+3e/Next Native
 +
: %100: Pentagon.
 +
: Writeable only in config mode.
 
|}
 
|}
  
 
Core 3.1.1 change:
 
Core 3.1.1 change:
 
port-decoding now depends on the selected display-mode, not machine-type. So while machine is still in Next type, by changing to 128 display the port decoding does change too (for example $7FFD port is decoded differently on ZX128 vs ZX128+3 machines).
 
port-decoding now depends on the selected display-mode, not machine-type. So while machine is still in Next type, by changing to 128 display the port decoding does change too (for example $7FFD port is decoded differently on ZX128 vs ZX128+3 machines).

Latest revision as of 07:33, 27 April 2020

Number $03
Readable Yes
Writable Yes
Short Description Identifies timing and machine type.

A write to this register disables the bootrom in config mode

A write with bit 7 set will be accepted in any mode to change only display timing (bits 6-4).

Bit Function
7 (W) 1 to allow changes to bits 6:4
7 (R) Next write to Enhanced ULA Palette Extension ($44) will affect colour byte: 0 = RRRGGGBB, 1 = p000000B
6-4 Display timing (affects I/O port decoding (since core 3.1.1)):
 %000: internal usage
 %001: ZX 48k
 %010: ZX 128k/+2 (Grey)
 %011: ZX +2A-B/+3e/Next Native
 %100: Pentagon.
3 1 to toggle user lock on display timing (hard reset = 0) (since core 3.1.0)
2-0 Machine type (determines roms loaded and multiface type (since core 3.1.1)):
 %000: Config mode
 %001: ZX 48k
 %010: ZX 128k/+2 (Grey)
 %011: ZX +2A-B/+3e/Next Native
 %100: Pentagon.
Writeable only in config mode.

Core 3.1.1 change: port-decoding now depends on the selected display-mode, not machine-type. So while machine is still in Next type, by changing to 128 display the port decoding does change too (for example $7FFD port is decoded differently on ZX128 vs ZX128+3 machines).