Difference between revisions of "Machine Type Register"
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(Making this more in sync with web docs about ports, and removing non-existent links.) |
(New features from KS Update #41.) |
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Only valid in [[IPL]] or config mode (0x0000-0x3FFF are mapped to the RAM instead of the internal ROM). | Only valid in [[IPL]] or config mode (0x0000-0x3FFF are mapped to the RAM instead of the internal ROM). | ||
| − | A write | + | A write to this register disables the IPL. |
| + | |||
| + | A write with bit 7 set will be accepted in any mode to change only timing (bits 6-4). | ||
{| class="wikitable" | {| class="wikitable" | ||
Revision as of 02:08, 23 December 2018
| Number | $03 |
|---|---|
| Readable | Yes |
| Writable | Yes |
| Short Description | Identifies timing and machine type. |
Only valid in IPL or config mode (0x0000-0x3FFF are mapped to the RAM instead of the internal ROM).
A write to this register disables the IPL.
A write with bit 7 set will be accepted in any mode to change only timing (bits 6-4).
| Bit | Function |
|---|---|
| 7 | Lock Timing |
| 6-4 | Timing. %000-001: ZX 48k; %010: ZX 128k/+2 (Grey); %011: ZX +2A-B/+3e/Next Native; %100: Pentagon. |
| 3 | Reserved, must be 0 |
| 2-0 | Machine type. %000: Config mode; %001: ZX 48k; %010: ZX 128k/+2 (Grey); %011: ZX +2A-B/+3e/Next Native; %100: Pentagon. |