Difference between revisions of "Keymap High Address Register"

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{{NextRegister
 
{{NextRegister
 
|Number=$28
 
|Number=$28
|Readable=No
+
|Readable=Yes
 
|Writable=Yes
 
|Writable=Yes
|ShortDesc=High address of Keymap (MSB in bit 0)
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|ShortDesc=PS/2 Keymap address MSB, read (pending) first byte of palette colour
 
}}
 
}}
Bits 7-1 are reserved, must be 0. Bit 0 is MSB of keymap address.
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Write:
 +
  bits 7:1 = Reserved, must be 0
 +
  bit 0 = MSB keymap address
 +
 
 +
Read:
 +
 
 +
  bits 7:0 = Stored first-byte palette value from {{NextRegNo|$44}}
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 +
This value does update right after writing first 8 bits of colour to NextReg $44, while the real palette entry is modified only after the second write (adding ninth bit and L2 priority bit) is done. So half-written value can't be read back through {{NextRegNo|$41}}, but can be read with this register (after writing second byte to $44, this register still reads the first byte value, but the change is also committed to the palette itself and visible by reading $41 + $44 registers).

Latest revision as of 20:42, 23 September 2020

Number $28
Readable Yes
Writable Yes
Short Description PS/2 Keymap address MSB, read (pending) first byte of palette colour

Write:

 bits 7:1 = Reserved, must be 0
 bit 0 = MSB keymap address

Read:

 bits 7:0 = Stored first-byte palette value from Enhanced ULA Palette Extension ($44)

This value does update right after writing first 8 bits of colour to NextReg $44, while the real palette entry is modified only after the second write (adding ninth bit and L2 priority bit) is done. So half-written value can't be read back through Palette Value Register ($41), but can be read with this register (after writing second byte to $44, this register still reads the first byte value, but the change is also committed to the palette itself and visible by reading $41 + $44 registers).