Expansion Bus Decoding b24-31 Register

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Number $89
Readable Yes
Writable Yes
Short Description When expansion bus is enabled: Internal ports decoding mask
Bit Description
7-1 (bit 31-25) Reserved, preserve the current value (or at least use 1)
0 (bit 24) Masking decoding: ($BF3B) and ($FF3B) (ULA+)

All bits are set to 1 upon hard reset.

When the expansion bus is on, the expansion port decoding mask (Next Registers $86-$89) is logically ANDed with the internal enables (Next Registers $82-$85). A zero bit indicates the internal device is disabled.

If the expansion bus is on, this allows I/O cycles for disabled internal ports to propagate to the expansion bus, otherwise corresponding I/O cycles to the expansion bus are filtered.

(note: Next registers with number higher than $7F are inaccessible from Copper code)