Difference between revisions of "Expansion Bus Control Register"

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m (core 3.0.5 changes/refresh)
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(core 3.0.5 changes/refresh)
 
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|ShortDesc=Expansion bus controls
 
|ShortDesc=Expansion bus controls
 
}}
 
}}
Read (may change in the future):
 
 
{|class="wikitable"
 
{|class="wikitable"
 
! Bit !! Description
 
! Bit !! Description
 
|-
 
|-
| 7 || ROMCS is being asserted on the expansion bus
+
| 7 || 1 if ROMCS is being asserted on the expansion bus (Read only, write 0)
 
|-
 
|-
| 6 || Expansion bus is currently enabled
+
| 4 || 1 to propagate the max CPU clock at all times including when the expansion bus is off
 
|-
 
|-
| 5 || Max clock is always propagated to the expansion bus
+
| 1-0 || max CPU speed when the expansion bus is on (currently fixed at 00 = 3.5MHz)
|-
 
| 4 || 0 indicates the 48K rom is locked in place
 
|-
 
| 3-2 || Reserved
 
|-
 
| 1-0 || Max cpu speed while the expansion bus is enabled
 
 
|}
 
|}
  
Write (may change in the future):
+
Set to 0 upon hard reset.
{|class="wikitable"
+
 
! Bit !! Description
+
(new register since core 3.0.5)
|-
 
| 7 || Make change immediate otherwise changes are noted for next soft reset
 
|-
 
| 6 || Enable the expansion bus (hard reset = 0)
 
|-
 
| 5 || Always propagate the max clock to the expansion bus (hard reset = 0)
 
|-
 
| 4 || 0 to lock the 48k rom in place (hard reset = 0)
 
|-
 
| 3-2 || Reserved, must be 0
 
|-
 
| 1-0 || CPU speed when the expansion bus is enabled (currently fixed at 00 = 3.5 MHz) (hard reset = 00)
 
|}
 
  
 
(note: Next registers with number higher than $7F are inaccessible from Copper code)
 
(note: Next registers with number higher than $7F are inaccessible from Copper code)

Latest revision as of 23:07, 4 December 2019

Number $81
Readable Yes
Writable Yes
Short Description Expansion bus controls
Bit Description
7 1 if ROMCS is being asserted on the expansion bus (Read only, write 0)
4 1 to propagate the max CPU clock at all times including when the expansion bus is off
1-0 max CPU speed when the expansion bus is on (currently fixed at 00 = 3.5MHz)

Set to 0 upon hard reset.

(new register since core 3.0.5)

(note: Next registers with number higher than $7F are inaccessible from Copper code)