Difference between revisions of "Datagear DMA Port"

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(Created page with "{{Port |Number=$xx6B |ShortDesc=Controls Z8410 DMA chip via Datagear standard. |PortMask= |Readable=? |Writable=Yes |Subsystem=DMA}}")
 
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{{Port
 
{{Port
 
|Number=$xx6B
 
|Number=$xx6B
|ShortDesc=Controls Z8410 DMA chip via Datagear standard.
+
|NumberDec=107
|PortMask=
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|PortMask=---- ---- 0110 1011
|Readable=?
+
|ShortDesc=Controls zxnDMA chip
 +
|Readable=Yes
 
|Writable=Yes
 
|Writable=Yes
|Subsystem=DMA}}
+
|Subsystem=DMA
 +
}}
 +
since core 3.1.2 this port $6B is always in "zxnDMA" mode, for "Zilog DMA" use {{PortNo|$xx0B}}.
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<del>Be aware the [[DMA|zxnDMA]] is by default in the new "zxnDMA" mode, acting slightly differently than original Zilog DMA.</del>
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<del>Use {{NextRegNo|$06}} to enable the "Zilog DMA" mode in case your SW expects Zilog-like behaviour of DMA transfers.</del>

Latest revision as of 11:49, 4 May 2020

Number $xx6B
Decimal 107
Short desc. Controls zxnDMA chip
Bit Mask ---- ---- 0110 1011
Readable Yes
Writable Yes
Subsystem DMA

since core 3.1.2 this port $6B is always in "zxnDMA" mode, for "Zilog DMA" use MB02 DMA Port ($xx0B / 11).

Be aware the zxnDMA is by default in the new "zxnDMA" mode, acting slightly differently than original Zilog DMA.

Use Peripheral 2 Register ($06) to enable the "Zilog DMA" mode in case your SW expects Zilog-like behaviour of DMA transfers.