CTC Channels

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Revision as of 22:15, 1 July 2022 by Em00k (talk | contribs) (Created page with "{{Port |Number=$183B |NumberDec=6203 |PortMask=%0001 1XXX 0011 1011 |ShortDesc=CTC 8 channels 0x183b - 0x1f3b |Readable=Yes |Writable=Yes |Subsystem=CTC }} CTC The CTC has...")
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Number $183B
Decimal 6203
Short desc. CTC 8 channels 0x183b - 0x1f3b
Bit Mask %0001 1XXX 0011 1011
Readable Yes
Writable Yes
Subsystem CTC


The CTC has been temporarily reduced to four channels from eight.

Eight independent CTC channels are available on ports 0x183B through 0x1F3B. These perform counter / timer functions that can be used to generate timer interrupts or to generate interrupts on behalf of physical signals.

The CTC is a standard Zilog part. Its datasheet can be found at http://www.zilog.com/docs/z80/ps0181.pdf . The Zilog documentation is ambiguous around how soft resets are treated so the following clarifies some points in the Next's implementation.

1. Hard reset requires a control word to be written with D2 = 1 (time constant follows) otherwise the channel effectively ignores the control word and will remain in the hard reset state.
2. Soft reset is generated when the control word's D1 = 1. if D2 = 0, the channel will enter the hard reset state. If D2 = 1 the channel expects a time constant to be written next and after that the counter/timer will run as expected.
3. Changing the trigger edge selection in bit 4 counts as a clock edge. A timer waiting for a clock edge to start will start and in counter mode, the count will be decremented.
4. ZC/TO is asserted for one clock cycle and not for the entire duration that the count is at zero.

To soft reset a particular channel that is in an unknown state, a soft reset control word should be written twice with D2 = 0 (no time constant follows).

At the moment, the ZC/TO output of each channel is fed into the CLK/TRG input of the succeeding channel so that time and count periods can be cascaded. Channel 3's ZC/TO output is divided by two and drives the joystick's clock in io mode.