User contributions

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• 23:04, 4 January 2020 (diff | hist) . . (+1)‎ . . m Enhanced ULA Control Register ‎
• 00:45, 4 January 2020 (diff | hist) . . (+214)‎ . . Layer 2 Control Register ‎ (core 3.0.7 changes/refresh)
• 17:07, 3 January 2020 (diff | hist) . . (+36)‎ . . NEX file format ‎ (V1.3 extensions proposal - refined some details after testing NEXLOAD2 prototype)
• 17:05, 3 January 2020 (diff | hist) . . (-1)‎ . . m NEX file format ‎
• 17:04, 3 January 2020 (diff | hist) . . (+501)‎ . . NEX file format ‎ (V1.3 extensions proposal - refined some details after testing NEXLOAD2 prototype)
• 17:28, 2 January 2020 (diff | hist) . . (+85)‎ . . m Layer 2 Control Register ‎
• 17:26, 2 January 2020 (diff | hist) . . (+1,881)‎ . . N Layer 2 Control Register ‎ (core 3.0.7 changes/refresh)
• 11:05, 31 December 2019 (diff | hist) . . (+238)‎ . . Datagear DMA Port ‎ (add info)
• 11:00, 31 December 2019 (diff | hist) . . (+506)‎ . . MB02 DMA Port ‎ (core 3.0.7 changes/refresh)
• 10:55, 31 December 2019 (diff | hist) . . (+19)‎ . . m Layer 2 Access Port ‎
• 10:54, 31 December 2019 (diff | hist) . . (+1,469)‎ . . Layer 2 Access Port ‎ (core 3.0.7 changes/refresh)
• 10:20, 31 December 2019 (diff | hist) . . (+165)‎ . . Plus 3 Memory Paging Control ‎ (adding info)
• 10:16, 31 December 2019 (diff | hist) . . (+204)‎ . . Next Memory Bank Select ‎ (adding info)
• 10:14, 31 December 2019 (diff | hist) . . (+58)‎ . . Memory Paging Control ‎ (adding info)
• 10:10, 31 December 2019 (diff | hist) . . (+293)‎ . . Video Modes ‎ (core 3.0 changes/refresh)
• 09:29, 31 December 2019 (diff | hist) . . (+83)‎ . . Timex Sinclair Video Mode Control ‎ (fixing the description Enhanced ULA mechanics, and overall adding info)
• 08:37, 31 December 2019 (diff | hist) . . (+157)‎ . . ULA Control Port ‎ (adding info)
• 08:27, 31 December 2019 (diff | hist) . . (+187)‎ . . Keyboard ‎ (info about multi-row reading possible)
• 18:59, 30 December 2019 (diff | hist) . . (+317)‎ . . NEX file format ‎ (V1.3 extensions proposal: added copper code block)
• 18:53, 30 December 2019 (diff | hist) . . (+133)‎ . . m NEX file format ‎
• 18:51, 30 December 2019 (diff | hist) . . (+32)‎ . . NEX file format ‎ (V1.3 extensions proposal added)
• 18:50, 30 December 2019 (diff | hist) . . (+2,559)‎ . . NEX file format ‎
• 01:57, 30 December 2019 (diff | hist) . . (+122)‎ . . NEX file format ‎ (Adding info about some NEX file having extra binary data appended to the "original" file)
• 01:11, 30 December 2019 (diff | hist) . . (+440)‎ . . NEX file format ‎ (Adding info about current V1.3 header)
• 15:30, 29 December 2019 (diff | hist) . . (+311)‎ . . DMA ‎ (fixing info based on the new experiments/evidence with Zilog DMA chip)
• 12:55, 25 December 2019 (diff | hist) . . (+174)‎ . . DMA ‎ (fixing info based on the new experiments/evidence with Zilog DMA chip)
• 20:55, 18 December 2019 (diff | hist) . . (+35)‎ . . DMA ‎ (extending info about Z80 interrupts in burst mode)
• 14:22, 18 December 2019 (diff | hist) . . (+2,621)‎ . . DMA ‎ (writing down technical info collected in recent days)
• 18:10, 11 December 2019 (diff | hist) . . (+38)‎ . . Peripheral 2 Register ‎ (summary enriched)
• 23:19, 9 December 2019 (diff | hist) . . (-132)‎ . . Sprite port-mirror Attribute 3 (with INC) Register ‎ (refresh sprite info) (current)
• 23:15, 9 December 2019 (diff | hist) . . (-132)‎ . . Sprite port-mirror Attribute 3 Register ‎ (refresh sprite info) (current)
• 20:56, 6 December 2019 (diff | hist) . . (+70)‎ . . Sprite port-mirror Index Register ‎ (read register detail extended by info from Allen) (current)
• 23:26, 4 December 2019 (diff | hist) . . (+55)‎ . . Machine Type Register ‎ (core 3.0.5 changes/refresh)
• 23:20, 4 December 2019 (diff | hist) . . (+264)‎ . . CPU Speed Register ‎ (core 3.0.5 changes/refresh)
• 23:13, 4 December 2019 (diff | hist) . . (+52)‎ . . Peripheral 4 Register ‎ (core 3.0.5 changes/refresh)
• 23:07, 4 December 2019 (diff | hist) . . (-493)‎ . . Expansion Bus Control Register ‎ (core 3.0.5 changes/refresh) (current)
• 22:58, 4 December 2019 (diff | hist) . . (-373)‎ . . Expansion Bus Enable Register ‎ (core 3.0.5 changes/refresh)
• 22:53, 4 December 2019 (diff | hist) . . (+996)‎ . . m Expansion Bus Control Register ‎ (core 3.0.5 changes/refresh) (Tag: Removed redirect)
• 22:52, 4 December 2019 (diff | hist) . . (0)‎ . . m Expansion Bus Enable Register ‎ (core 3.0.5 changes/refresh)
• 22:50, 4 December 2019 (diff | hist) . . (0)‎ . . Expansion Bus Enable Register ‎ (core 3.0.5 changes/refresh)
• 22:48, 4 December 2019 (diff | hist) . . (0)‎ . . m Expansion Bus Enable Register ‎ (Ped7g moved page Expansion Bus Control Register to Expansion Bus Enable Register: core 3.0.5 change/refresh)
• 22:48, 4 December 2019 (diff | hist) . . (+43)‎ . . N Expansion Bus Control Register ‎ (Ped7g moved page Expansion Bus Control Register to Expansion Bus Enable Register: core 3.0.5 change/refresh) (Tag: New redirect)
• 22:46, 4 December 2019 (diff | hist) . . (+27)‎ . . m Alternate ROM ‎
• 22:45, 4 December 2019 (diff | hist) . . (+711)‎ . . N Alternate ROM ‎ (core 3.0.5 changes/refresh)
• 20:14, 2 December 2019 (diff | hist) . . (+318)‎ . . Memory Paging Control ‎ (core 3.0 changes/refresh)
• 19:51, 2 December 2019 (diff | hist) . . (+359)‎ . . File Formats ‎ (SNA vs new NextZXOS info)
• 19:44, 2 December 2019 (diff | hist) . . (+28)‎ . . Peripheral 3 Register ‎ (core 3.0 changes/refresh)
• 19:36, 2 December 2019 (diff | hist) . . (+333)‎ . . Peripheral 3 Register ‎ (core 3.0 changes/refresh)
• 05:21, 1 December 2019 (diff | hist) . . (-7)‎ . . Memory Paging Control ‎ (core 3.0 changes/refresh)
• 00:00, 1 December 2019 (diff | hist) . . (+96)‎ . . Layer 2 RAM Shadow Page Register ‎ (core 3.0 changes/refresh) (current)

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