Memory Mapping Register: Difference between revisions

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|Readable=Yes
|Readable=Yes
|Writable=Yes
|Writable=Yes
|ShortDesc=Control classic Spectrum memory mapping
|ShortDesc=Control classic 128K Spectrum memory mapping
}}
}}


     bit 7 = port 0xdffd bit 0        \  RAM
     bit 7 = port 0xdffd bit 0        \  RAM
     bits 6:4 = port 0x7ffd bits 2:0  /  bank
     bits 6:4 = port 0x7ffd bits 2:0  /  bank 0-15
  R bit 3 = 1
    R bit 3 = 1
  W bit 3 = 1 to change RAM page
    W bit 3 = 1 to change RAM bank,
            = 0 no change to mmu6 / mmu7 / RAM bank in ports 0x7ffd, 0xdffd
     bit 2 = port 0x1ffd bit 0            paging mode
     bit 2 = port 0x1ffd bit 0            paging mode
  If bit 2 = paging mode = 0 (normal)
    If bit 2 = paging mode = 0 (normal)
    bit 1 = port 0x1ffd bit 2        \  ROM
    bit 1 = port 0x1ffd bit 2        \  ROM
    bit 0 = port 0x7ffd bit 4        /  select
    bit 0 = port 0x7ffd bit 4        /  select
  If bit 2 = paging mode = 1 (special)
    If bit 2 = paging mode = 1 (special allRAM)
    bit 1 = port 0x1ffd bit 2        \  all
    bit 1 = port 0x1ffd bit 2        \  all
    bit 0 = port 0x1ffd bit 1        /  RAM
    bit 0 = port 0x1ffd bit 1        /  RAM


: Writes can affect all ports 0x7ffd, 0xdffd, 0x1ffd
: Writes can affect all ports {{PortNo|$7FFD}}, {{PortNo|$DFFD}}, {{PortNo|$1FFD}}
: Writes always change the ROM / allRAM mapping
: Writes always change the ROM / allRAM mapping
: Writes immediately change the current mmu mapping as if by port write
: Writes immediately change the current mmu mapping as if by port write

Latest revision as of 21:59, 29 July 2026

Next Register Number $8E
Readable Yes
Writable Yes
Short Description Control classic 128K Spectrum memory mapping


   bit 7 = port 0xdffd bit 0         \  RAM
   bits 6:4 = port 0x7ffd bits 2:0   /  bank 0-15
   R bit 3 = 1
   W bit 3 = 1 to change RAM bank,
           = 0 no change to mmu6 / mmu7 / RAM bank in ports 0x7ffd, 0xdffd
   bit 2 = port 0x1ffd bit 0            paging mode
   If bit 2 = paging mode = 0 (normal)
    bit 1 = port 0x1ffd bit 2         \  ROM
    bit 0 = port 0x7ffd bit 4         /  select
   If bit 2 = paging mode = 1 (special allRAM)
    bit 1 = port 0x1ffd bit 2         \  all
    bit 0 = port 0x1ffd bit 1         /  RAM
Writes can affect all ports IO:$7FFD, IO:$DFFD, IO:$1FFD
Writes always change the ROM / allRAM mapping
Writes immediately change the current mmu mapping as if by port write

(new register since core 3.1.1)

(note: Next registers with number higher than $7F are inaccessible from Copper code)