https://wiki.specnext.dev/index.php?action=history&feed=atom&title=DIVMMC 2026-05-07T07:33:32Z Revision history for this page on the wiki MediaWiki 1.43.5 https://wiki.specnext.dev/index.php?title=DIVMMC&diff=11769&oldid=prev 2022-07-01T22:08:58Z

<p>Created page with &quot;{{Port |Number=$E3 |NumberDec=227 |ShortDesc=Divmmc control |Readable=Yes |Writable=Yes |Subsystem=DIVMMC }} 0xE3 Divmmc control (R/W) :bit 7 = conmem = 1 to map in divmmc...&quot;</p> <p><b>New page</b></p><div>{{Port<br /> |Number=$E3<br /> |NumberDec=227<br /> |ShortDesc=Divmmc control<br /> |Readable=Yes<br /> |Writable=Yes<br /> |Subsystem=DIVMMC<br /> }}<br /> 0xE3 Divmmc control<br /> <br /> (R/W)<br /> :bit 7 = conmem = 1 to map in divmmc, 0K-8K will contain the esxdos rom, 8K-16K will contain the selected divmmc bank<br /> :bit 6 = mapram = 1 to replace the esxdos rom with divmmc bank 3<br /> :bits 3:0 = bank = selected divmmc ram bank for 8K-16K region<br /> <br /> * conmen can be used to manually control divmmc mapping.<br /> <br /> * divmmc automatically maps itself in when instruction fetches hit specific addresses in the rom. When this happens, the esxdos rom (or divmmc bank 3 if mapram is set) appears in 0K-8K and the selected divmmc bank appears as ram in 8K-16K.<br /> <br /> * bit 6 can only be set, once set only a power cycle can reset it on the original divmmc.<br /> nextreg 0x09 bit 3 can be set to reset this bit.<br /> <br /> <br /> The divmmc has been enhanced in the zx next to add more entry points and make them programmable.<br /> See nextreg 0xB8 - 0xBB.</div>

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