Alternate ROM Register - Revision history

Xalior: Xalior moved page Alternate ROM to Alternate ROM Register: match formal nextreg.txt name

2025-10-14T12:31:52Z

Xalior moved page Alternate ROM to Alternate ROM Register: match formal nextreg.txt name

← Older revision		Revision as of 13:31, 14 October 2025
(No difference)

Ped7g: adding extra detailed explanation

2020-05-24T16:01:48Z

adding extra detailed explanation

@@ Line 32: / Line 32: @@
 The locking mechanism also applies if the alt rom is not enabled. For the +3 and zx next, if the two lock bits are not zero, then the corresponding rom page is locked in place. Other models use the bits to preferentially lock the corresponding 48K rom or the 128K rom.
 (new register since core 3.0.5, further slightly modified in 3.1.x cores)
 (note: Next registers with number higher than $7F are inaccessible from Copper code)

Ped7g: core 3.1.3 changes/refresh

2020-03-30T11:05:06Z

core 3.1.3 changes/refresh

← Older revision		Revision as of 12:05, 30 March 2020
Line 33:		Line 33:
	The locking mechanism also applies if the alt rom is not enabled. For the +3 and zx next, if the two lock bits are not zero, then the corresponding rom page is locked in place. Other models use the bits to preferentially lock the corresponding 48K rom or the 128K rom.		The locking mechanism also applies if the alt rom is not enabled. For the +3 and zx next, if the two lock bits are not zero, then the corresponding rom page is locked in place. Other models use the bits to preferentially lock the corresponding 48K rom or the 128K rom.

	(new register since core 3.0.5)		(new register since core 3.0.5, further slightly modified in 3.1.x cores)

	(note: Next registers with number higher than $7F are inaccessible from Copper code)		(note: Next registers with number higher than $7F are inaccessible from Copper code)

Ped7g: core 3.1.3 changes/refresh

2020-03-30T11:04:16Z

core 3.1.3 changes/refresh

← Older revision		Revision as of 12:04, 30 March 2020
Line 14:		Line 14:
	\| 6 \|\| 1 to make alternate ROM visible only during writes, 0 to make alternate ROM visible during reads		\| 6 \|\| 1 to make alternate ROM visible only during writes, 0 to make alternate ROM visible during reads
	\|-		\|-
	\| 4 \|\| 1 to lock ~~48k~~ ROM		\| 5 \|\| 1 to lock ROM1 (48K ROM)
			\|-
			\| 4 \|\| 1 to lock ROM0 (128k ROM)
	\|-		\|-
	\| \|\| After soft reset (will be copied to bits 7-4)		\| \|\| After soft reset (will be copied to bits 7-4)
Line 22:		Line 24:
	\| 2 \|\| 1 to make alternate ROM visible only during writes, 0 to make alternate ROM visible during reads		\| 2 \|\| 1 to make alternate ROM visible only during writes, 0 to make alternate ROM visible during reads
	\|-		\|-
	\| 0 \|\| 1 to lock ~~48k~~ ROM		\| 1 \|\| 1 to lock ROM1 (48K ROM)
			\|-
			\| 0 \|\| 1 to lock ROM0 (128k ROM)
	\|}		\|}

	Set to 0 upon hard reset.		Set to 0 upon hard reset.

			The locking mechanism also applies if the alt rom is not enabled. For the +3 and zx next, if the two lock bits are not zero, then the corresponding rom page is locked in place. Other models use the bits to preferentially lock the corresponding 48K rom or the 128K rom.

	(new register since core 3.0.5)		(new register since core 3.0.5)

	(note: Next registers with number higher than $7F are inaccessible from Copper code)		(note: Next registers with number higher than $7F are inaccessible from Copper code)

Ped7g at 22:46, 4 December 2019

2019-12-04T22:46:10Z

← Older revision		Revision as of 23:46, 4 December 2019
Line 24:		Line 24:
	\| 0 \|\| 1 to lock 48k ROM		\| 0 \|\| 1 to lock 48k ROM
	\|}		\|}

			Set to 0 upon hard reset.

	(new register since core 3.0.5)		(new register since core 3.0.5)

	(note: Next registers with number higher than $7F are inaccessible from Copper code)		(note: Next registers with number higher than $7F are inaccessible from Copper code)

Ped7g: core 3.0.5 changes/refresh

2019-12-04T22:45:17Z

core 3.0.5 changes/refresh

New page

{{NextRegister
|Number=$8C
|Readable=Yes
|Writable=Yes
|ShortDesc=Enable alternate ROM or lock 48k ROM
}}
{|class="wikitable"
! Bit !! Description
|-
| || Values affecting machine immediately
|-
| 7 || 1 to enable alternate ROM
|-
| 6 || 1 to make alternate ROM visible only during writes, 0 to make alternate ROM visible during reads
|-
| 4 || 1 to lock 48k ROM
|-
| || After soft reset (will be copied to bits 7-4)
|-
| 3 || 1 to enable alternate ROM
|-
| 2 || 1 to make alternate ROM visible only during writes, 0 to make alternate ROM visible during reads
|-
| 0 || 1 to lock 48k ROM
|}

(new register since core 3.0.5)

(note: Next registers with number higher than $7F are inaccessible from Copper code)