GPIO Socket (J15)
The GPIO socket, marked J15 on the circuit board, allows access to several different power and data lines:
- I2C serial protocol
- Spare pins on the FPGA
- 5v, 3.3v and GND
The GPIO is not populated and requires a socket to be installed (2 x 10 IDC 2.54mm spc. Male Pin Header). Pull up/down resistors may be required for some pins to limit current.
In June 2019 it was announced that pins 4 and 17 of J15 would be used for two additional keyboard connections on full cased Nexts. This is factory fitted on 2B boards with a two slot connector for the additional two lines on a third membrane tail. The extra data is handled by the VHDL in the FPGA so it still appears as a standard 48K Membrane but, without the complexity of three layers needed.
This change does mean it is slightly harder to use J15 as the socket overlaps some ajoining holes slightly.