Machine Type Register
From SpecNext Wiki
| Number | TBRegisterNumber::$03 |
|---|---|
| Readable | TBRegisterReadable::Yes |
| Writable | TBRegisterWritable::Yes |
| Short Description | ShortDesc::Identifies timing and machine type. |
Only valid in IPL or config mode (0x0000-0x3FFF are mapped to the RAM instead of the internal ROM).
A write to this register disables the IPL.
A write with bit 7 set will be accepted in any mode to change only timing (bits 6-4).
| Bit | Function |
|---|---|
| 7 | (W) Lock Timing (change timing in any mode) |
| 7 | (R) Next write to {{#ask:
TBRegisterNumber::$44 }} ($44) will affect colour byte: 0 = RRRGGGBB, 1 = p000000B |
| 6-4 | Timing. %000-001: ZX 48k; %010: ZX 128k/+2 (Grey); %011: ZX +2A-B/+3e/Next Native; %100: Pentagon. |
| 3 | Reserved, must be 0 |
| 2-0 | Machine type. %000: Config mode; %001: ZX 48k; %010: ZX 128k/+2 (Grey); %011: ZX +2A-B/+3e/Next Native; %100: Pentagon. |