XADC D1

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Revision as of 00:33, 7 April 2025 by Em00k (talk | contribs) (Correct incorrect register number to correct : Number=$FA as per https://gitlab.com/SpectrumNext/ZX_Spectrum_Next_FPGA/-/blob/master/cores/zxnext/nextreg.txt)
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Number $FA
Readable Yes
Writable Yes
Short Description Issue 4 only 
  bits 7:0 = MSB data connected to XADC DRP data bus D15:8

DRP reads store result here, DRP writes take value from here

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