Alternate ROM
From SpecNext official Wiki
| Number | $8C |
|---|---|
| Readable | Yes |
| Writable | Yes |
| Short Description | Enable alternate ROM or lock 48k ROM |
| Bit | Description |
|---|---|
| Values affecting machine immediately | |
| 7 | 1 to enable alternate ROM |
| 6 | 1 to make alternate ROM visible only during writes, 0 to make alternate ROM visible during reads |
| 5 | 1 to lock ROM1 (48K ROM) |
| 4 | 1 to lock ROM0 (128k ROM) |
| After soft reset (will be copied to bits 7-4) | |
| 3 | 1 to enable alternate ROM |
| 2 | 1 to make alternate ROM visible only during writes, 0 to make alternate ROM visible during reads |
| 1 | 1 to lock ROM1 (48K ROM) |
| 0 | 1 to lock ROM0 (128k ROM) |
Set to 0 upon hard reset.
The locking mechanism also applies if the alt rom is not enabled. For the +3 and zx next, if the two lock bits are not zero, then the corresponding rom page is locked in place. Other models use the bits to preferentially lock the corresponding 48K rom or the 128K rom.
(new register since core 3.0.5, further slightly modified in 3.1.x cores)
(note: Next registers with number higher than $7F are inaccessible from Copper code)