Extended Z80 instruction set

From SpecNext official Wiki
Revision as of 20:47, 14 August 2017 by wiki>Hyphz (Created page with "== Standard Z80 Instructions == === Register and Data manipulation === ;LD :The basic data load/transfer instruction. Transfers data from the location specified by the secon...")
(diff) ← Older revision | Latest revision (diff) | Newer revision → (diff)
Jump to: navigation, search

Standard Z80 Instructions

Register and Data manipulation

LD
The basic data load/transfer instruction. Transfers data from the location specified by the second argument, to the location specified by the first. Available combinations are as follows:
  • Any 8-bit register can be:
    • loaded with an immediate value;
    • loaded with the contents of any other 8-bit register except I and R;
    • loaded with the contents of, or stored in, memory pointed to by HL;
    • loaded with the contents of, or stored in, memory offset-indexed by IX or IY.
  • Additionally, the accumulator A (only) can be:
    • loaded with the contents of, or stored in, memory pointed to by BC or DE;
    • loaded with the contents of, or stored in, memory pointed to by an immediate address;
    • loaded with the contents of I or R.
  • Any 16-bit register pair can be:
    • loaded with an immediate value;
    • loaded with the contents of, or stored in, memory pointed to by an immediate address.
  • Additionally, SP (only) can be:
    • loaded with the contents of HL, IX, or IY.
Although 16-bit register pairs cannot be directly moved between each other, they can be moved by moving the two 8-bit registers. (SP gets a special case because it can't be addressed via 8-bit registers.) Some assemblers will provide built-in macro instructions allowing, for example, ld bc, de.


EX
Exchanges the contents of two sources. The only permitted combinations are
  • Exchanging DE and HL;
  • Exchanging AF and AF';
  • Exchanging HL, IX, or IY with the contents of memory pointed to by SP.
Has no effect on flags (unless AF is exchanged, of course)


EXX
Exchanges BC, DE, and HL with their shadow registers. AF and AF' are not exchanged. Has no effect on flags.


Block Copy

LDI
Copies the byte pointed to by HL to the address pointed to by DE, then adds 1 to DE and HL and subtracts 1 from BC. If BC did not reach 0, P/V is reset, otherwise it is set. H and N are reset.


LDIR
Automatically loops LDI until BC reaches zero. Note that no loop occurs when BC reaches zero.


LDD
Same as LDI, but subtracts 1 from DE and HL instead of adding.


LDDR
Same as LDIR but loops LDD instead of LDI.


Block Search

CPI
Compares the byte pointed to by HL with the contents of A and sets Z if it matches. Then adds 1 to HL and subtracts 1 from BC. Sets P/V if BC did not reach 0 or resets it if it did.


CPIR
Automatically loops CPI until either Z is set (A is found in the byte pointed to by HL) or P/V is reset (BC reached 0).


CPD
Same as CPI, but subtracts 1 from HL instead of adding it.


CPDR
Same as CPIR but loops CPD instead of CPI.


Arithmetic

ADD
Adds values together. Legal combinations are:
  • When adding 8-bit values the first parameter must be A and the second may be:
    • The contents of an 8-bit register;
    • An immediate value;
    • The contents of memory pointed to by HL or by indexing based on IX or IY.
  • When adding 16-bit values the first parameter must be HL, IX or IY and the second must be another 16-bit register pair.
  • On the Spectrum Next the extended Z80 set also allows the first parameter to be HL, DE, or BC and the second to be A.


Extended Z80 Instructions

Useless Z80 Instructions

These instructions are effectively useless on the Next for the reasons given below.

OUT imm8, A; OTIR; OTDR; INDR; INIR
Incompatible with 16-bit port addressing as they place spurious values on the top address bus.