Expansion Bus Control Register
From SpecNext official Wiki
| Number | $81 |
|---|---|
| Readable | Yes |
| Writable | Yes |
| Short Description | Expansion bus controls |
Read (may change in the future):
| Bit | Description |
|---|---|
| 7 | ROMCS is being asserted on the expansion bus |
| 6 | Expansion bus is currently enabled |
| 5 | Max clock is always propagated to the expansion bus |
| 4 | 0 indicates the 48K rom is locked in place |
| 3-2 | Reserved |
| 1-0 | Max cpu speed while the expansion bus is enabled |
Write (may change in the future):
| Bit | Description |
|---|---|
| 7 | Make change immediate otherwise changes are noted for next soft reset |
| 6 | Enable the expansion bus (hard reset = 0) |
| 5 | Always propagate the max clock to the expansion bus (hard reset = 0) |
| 4 | 0 to lock the 48k rom in place (hard reset = 0) |
| 3-2 | Reserved, must be 0 |
| 1-0 | CPU speed when the expansion bus is enabled (currently fixed at 00 = 3.5 MHz) (hard reset = 00) |
(note: Next registers with number higher than $7F are inaccessible from Copper code)