Difference between revisions of "Kempston Joystick 2, Joystick I/O"
(core 3.1.5 changes/refresh) |
(core 3.1.5 changes/refresh) |
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| 4 || 0 to read "input" part of I/O from left joystick socket, 1 to read from right joystick socket | | 4 || 0 to read "input" part of I/O from left joystick socket, 1 to read from right joystick socket | ||
+ | The program can still change the active joystick via bit 4 of port 0x37 at any time but for uart mode this should be done during a quiet time in communication. Any output always appears on pin 7 of both joystick connectors. | ||
|- | |- | ||
| 3-1 || Reserved must be 0 | | 3-1 || Reserved must be 0 |
Revision as of 07:26, 27 April 2020
Number | $xx37 |
---|---|
Decimal | |
Short desc. | Kempston interface second joystick variant and controls joystick I/O. |
Bit Mask | |
Readable | Yes |
Writable | Yes |
Subsystem | Input |
For READ functionality the details are identical with Kempston Joystick ($xx1F / 31)
Since core3.1.5 there is option to do I/O operations through joystick ports.
The I/O mode should be set by writing this port first followed by enabling I/O mode on the joysticks with a write to Peripheral 1 Register ($05).
The WRITE functionality:
Bit | Function |
---|---|
7-6 | select I/O mode: %00 = bit bang, %01 = clock, %10 = uart |
5 | Reserved must be 0 |
4 | 0 to read "input" part of I/O from left joystick socket, 1 to read from right joystick socket
The program can still change the active joystick via bit 4 of port 0x37 at any time but for uart mode this should be done during a quiet time in communication. Any output always appears on pin 7 of both joystick connectors. |
3-1 | Reserved must be 0 |
0 | parameter bit controls state of pin 7 on both joystick connectors:
bit bang: bit 0 is copied to pin 7 |
† A runt clock pulse may appear in the first cycle, minimum pulse width is 1/Fsys = 35.7ns