Internal Port Decoding b24-31 Register

Next Register Number	$85
Readable	Yes
Writable	Yes
Short Description	Enabling internal ports decoding

Bit	Description
7-1	(bit 31-25) Reserved, use 1 (? to be confirmed)
0	(bit 24) Enabling IO:$BF3B and IO:$FF3B (ULA+)

All bits are set to 1 upon soft reset.

The internal port decoding enables always apply.

When the expansion bus is on, the expansion port decoding (Next Registers $86-$89) enables are logically ANDed with the internal enables (Next Registers $82-$85). A zero bit indicates the internal device is disabled.

If the expansion bus is on, this allows I/O cycles for disabled internal ports to propagate to the expansion bus, otherwise corresponding I/O cycles to the expansion bus are filtered.

(note: Next registers with number higher than $7F are inaccessible from Copper code)