CPU Speed Register: Difference between revisions

Revision as of 12:17, 11 November 2019

Number	TBRegisterNumber::$07
Readable	TBRegisterReadable::Yes
Writable	TBRegisterWritable::Yes
Short Description	ShortDesc::Sets accelerated clock speed, reads actual speed.

Read:

Bit	Function
7-6	Reserved
5-4	Current actual CPU speed
3-2	Reserved
1-0	Programmed CPU speed

Write:

Bit	Function
7-2	Reserved, must be 0
1-0	Set CPU speed (soft reset = %00) %00 = 3.5MHz %01 = 7MHz %10 = 14MHz %11 = 28MHz (reserved for future, currently gets dropped to %10 14MHz)

The CPU throttling from 14MHz to 7MHz is not happening in core 3.0+ any more (but if any configuration would require it, or 28MHz mode will be implemented with throttling, it can be seen by reading bits 5-4).

@@ Line 5: / Line 5: @@
 |ShortDesc=Sets accelerated clock speed, reads actual speed.
 }}
+Read:
+{| class="wikitable"
+! Bit !! Function
+|-
+| 7-6 || Reserved
+|-
+| 5-4 || Current actual CPU speed
+|-
+| 3-2 || Reserved
+|-
+| 1-0 || Programmed CPU speed
+|}
+Write:
+{| class="wikitable"
+! Bit !! Function
+|-
+| 7-2 || Reserved, must be 0
+|-
+| 1-0 || Set CPU speed (soft reset = %00)
+ %00 = 3.5MHz
+ %01 = 7MHz
+ %10 = 14MHz
+ %11 = 28MHz (reserved for future, currently gets dropped to %10 14MHz)
+|}
-Bit 1-0 = turbo: %00 = 3.5MHz, %01 = 7MHz, %10 = 14MHz (%00 after PoR or Hard-reset).
+The CPU throttling from 14MHz to 7MHz is not happening in core 3.0+ any more (but if any configuration would require it, or 28MHz mode will be implemented with throttling, it can be seen by reading bits 5-4).
-When 14MHz turbo is used, and [[Layer 2]] is enabled (bit 1 {{PortNo|$123B}}), the 14MHz speed is used only when BORDER/VBLANK/HBLANK areas of screen image are generated, during PAPER (centre 256x192 pixel area of screen) the CPU speed is dropped down to 7MHz. With [[Layer 2]] disabled, 14MHz CPU speed is stable.
-Reads actual CPU speed.