Circuit Diagrams: Difference between revisions
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|valign=top width=50%| [[Image: | |valign=top width=50%| [[Image:Expansion_bus_location.jpg|461px]] | ||
|valign=top| [[Image:Expansion_bus.png|461px]] | |valign=top| [[Image:Expansion_bus.png|461px]] | ||
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Revision as of 13:52, 14 April 2019
J13 - Daughter board connector
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J15 - Next GPIO
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CN5 - Expansion bus (edge connector)
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J10/J11 - Memory Expansion Ports
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