CPU Speed Register: Difference between revisions
From SpecNext Wiki
Core 2.00.22 changes. |
No edit summary |
||
| Line 7: | Line 7: | ||
Bit 1-0 = turbo: %00 = 3.5MHz, %01 = 7MHz, %10 = 14MHz (%00 after PoR or Hard-reset). | Bit 1-0 = turbo: %00 = 3.5MHz, %01 = 7MHz, %10 = 14MHz (%00 after PoR or Hard-reset). | ||
When 14MHz turbo is used, and [[Layer 2]] is enabled (bit 1 {{PortNo|$123B}}), the 14MHz speed is used only when BORDER/VBLANK/HBLANK areas of screen image are generated, during PAPER (centre 256x192 pixel area of screen) the CPU speed is dropped down to 7MHz. With [[Layer 2]] disabled, 14MHz CPU speed is stable. | |||
Reads actual CPU speed. | Reads actual CPU speed. | ||
Revision as of 01:49, 23 December 2018
| Number | TBRegisterNumber::$07 |
|---|---|
| Readable | TBRegisterReadable::Yes |
| Writable | TBRegisterWritable::Yes |
| Short Description | ShortDesc::Sets accelerated clock speed, reads actual speed. |
Bit 1-0 = turbo: %00 = 3.5MHz, %01 = 7MHz, %10 = 14MHz (%00 after PoR or Hard-reset).
When 14MHz turbo is used, and Layer 2 is enabled (bit 1 {{#ask: PortNumber::$123B }} ($123B{{#ask: PortNumber::$123B |mainlabel=- |headers=hide |intro= / |?NumberDec#- }})), the 14MHz speed is used only when BORDER/VBLANK/HBLANK areas of screen image are generated, during PAPER (centre 256x192 pixel area of screen) the CPU speed is dropped down to 7MHz. With Layer 2 disabled, 14MHz CPU speed is stable.
Reads actual CPU speed.