Memory map

The Memory Map of the Next is based on the memory structure of the ZX Spectrum 128 and +2a/+3.

The Z80's 16-bit bus can only access 64k of memory, which is divided into 4 "slots" as follows. Each of these 4 slots is mapped to a 16k bank of memory within the larger available address space.

Area	Description
$0000-$3999	Slot 1, usually ROM, but usable for Layer 2.
$4000-$7999	Slot 2, usually used for the ULA screen. Defaults to bank 5.
$8000-$BFFF	Slot 3, Free RAM. Defaults to bank 2.
$C000-$FFFF	Slot 4, Free RAM. Defaults to bank 0.

On the 48k Spectrum this is all the available memory there is, so no switching can be performed. On the 128k Spectrum, there are 8 available banks, numbered 0-7.

In standard mode, only Slot 4 is switchable. The active bank at slot 4 is selected by writing to the bottom 3 bits of Memory Paging Control ($7FFD / 32765). This can be any bank from 0 to 7, which means it can end up doubling the bank at $8000 (2) or $4000 (5).

On Next, there are more than 7 banks as there as a total of 1Mb of system memory. 512k of these is occupied by the hardware ROM and RAM images and the standard Spectrum 128k RAM banks, but the remaining 512k could provide 32 additional banks. The necessary extra bits are written to the lowest 3 bits of Next Memory Bank Select ($DFFD / 57341).

By default, extra banks 8-13 are used for Layer 2, although these can be reselected or reused if you are not using layer 2. It may also be possible to select any bank in slot 1 by "lying" that it is the address of Layer 2, then writing to it using the Layer 2 paging system without enabling display; but this behavior is likely unintended and may have unexpected results.

"Special paging mode" (also called "AllRam mode" or "CP/M mode") is enabled by writing a value with the LSB set to Plus 3 Memory Paging Control ($1FFD / 8189). Depending on the 3 low bits of this value a memory configuration is selected as follows:

Bits	Slot 1	Slot 2	Slot 3	Slot 4
%001	0	1	2	3
%011	4	5	6	7
%101	4	5	6	3
%111	4	7	6	3

ROM paging and selection

Slot 1 is usually ROM. Some programs may assume that they can find ROM service routines here. More importantly, if the default interrupt mode (IM 1) is set, the Z80 will jump the program counter to $0038 every frame expecting to find an interrupt handler there. If it does not, pain and suffering will likely result. DI is your friend.

ROM is not considered a bank and cannot be selected in any slot other than 1. The 128k Spectrum has 2 ROM pages which are selected in slot 1 by altering Bit 4 of Memory Paging Control ($7FFD / 32765). The +2a/+3 has 4 ROM pages; the extra bit needed to select between these is bit 2 of Plus 3 Memory Paging Control ($1FFD / 8189).

If you are using the standard interrupt handler or OS routines, then any time you write to Memory Paging Control ($7FFD / 32765) you should also store the value at $5B5C. Any time you write to Plus 3 Memory Paging Control ($1FFD / 8189) you should also store the value at $5B67.

Note that activating paging for Layer 2 will switch the selected layer 2 segment into slot 1. It is important that you disable interrupts when doing this.

Screen

Bank 5 is the slot read by the ULA for the screen. Setting bit 3 of Memory Paging Control ($7FFD / 32765) will have the ULA read from bank 7 (the "shadow screen") instead, which can be used as an alternate screen. Note that this does not remap slot 2; to alter bank 7 it must be switched in to slot 4. On the 128k Spectrum, banks 1, 3, 5, and 7 are all contended; on the +2a/+3, banks 4, 5, 6, and 7 are contended. Contended memory is subject to delays.

SRAM memory map

The SpecNext site provided the following raw memory map for the Next's entire static physical memory space without memory management:

• $00000 - ZX Spectrum Rom
• $10000 - ESXDOS Rom
• $14000 - Multiface ROM
• $18000 - Multiface extra ROM
• $1c000 - Multiface RAM
• $20000 - DivMMC RAM
• $60000 - Spectrum 128k Ram
• $80000 - Extra RAM
• $FFFFF - End of addressable space

However it is not clear if any Spectrum code will be able to make use of this memory map since the Z80 cores only support 16-bit addresses. This may therefore only be useful for FPGA development.