Difference between revisions of "Circuit Diagrams"
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Revision as of 11:01, 10 December 2023
Contents
- 1 Schematics
- 2 J13 - Daughter board connector - Issue 2A/2B
- 3 J13 - Daughter board connector - Issue 4
- 4 J15 - Next GPIO - Issue 2A/2B
- 5 J15 - Next GPIO - Issue 4
- 6 CN5 - Expansion bus (edge connector)
- 7 J10/J11 - Memory Expansion Ports
- 8 J4/J7 J8/J14 - Joystick Ports
- 9 CN1 - VGA Video Port
- 10 CN8 - Digital Port
- 11 CN2/CN6/CN7 - SD Reader (Mainboard) (CN6 on reverse)
- 12 CN10/CN11/CN12 - SD Reader (Daughterboard) (CN12 on reverse)
- 13 Accelerator Board
- 14 Real Time Clock (RTC)
- 15 CN9 - ESP8266-01/RS-232 Port
Schematics
The KS1 and KS2 schematics can be downloaded here.
The three tail matrix keyboard schematic can be downloaded here.
J13 - Daughter board connector - Issue 2A/2B
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J13 - Daughter board connector - Issue 4
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J15 - Next GPIO - Issue 2A/2B
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J15 - Next GPIO - Issue 4
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CN5 - Expansion bus (edge connector)
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J10/J11 - Memory Expansion Ports
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J4/J7 J8/J14 - Joystick Ports
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CN1 - VGA Video Port
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Notes:
- In VGA mode (scandoubler enabled), H-SYNC and V-SYNC are carried separately on their respective pins.
- In RGB mode (scandoubler disabled), H-SYNC carries composite sync, and V-SYNC carries 1.
- Pin 14 carries 3V3, which can be connected to SCART pin 16 to indicate RGB to the display.
- There is no convenient source of voltages between 9.5-12V to indicate 4:3 aspect ratio to the display on SCART pin 8, so this is usually left unconnected.
CN8 - Digital Port
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CN2/CN6/CN7 - SD Reader (Mainboard) (CN6 on reverse)
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CN10/CN11/CN12 - SD Reader (Daughterboard) (CN12 on reverse)
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Accelerator Board
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Real Time Clock (RTC)
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CN9 - ESP8266-01/RS-232 Port
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